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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-19 12:53:34 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-23 14:14:04 +0200 |
| commit | 3a646426aa421ab3e229ec483d8b29f2f56c29ac (patch) | |
| tree | dcd723d79a9c5670ef553d01d7e572f93c4e616f /cpukit/score/cpu/no_cpu | |
| parent | score: Add _CPU_Instruction_no_operation() (diff) | |
| download | rtems-3a646426aa421ab3e229ec483d8b29f2f56c29ac.tar.bz2 | |
score: Add _CPU_Instruction_illegal()
On some architectures/simulators it is difficult to provoke an
exception with misaligned or illegal data loads. Use an illegal
instruction instead.
Update #3433.
Diffstat (limited to 'cpukit/score/cpu/no_cpu')
| -rw-r--r-- | cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h index c13180a06d..86d0ace0f3 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h @@ -105,6 +105,16 @@ void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); /** + * @brief Emits an illegal instruction. + * + * This function is used only in test sptests/spfatal26. + */ +RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) +{ + __asm__ volatile ( ".word 0" ); +} + +/** * @brief Emits a no operation instruction (nop). * * This function is used only in test sptests/spcache01. |