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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-01-28 12:10:08 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-04 10:06:35 +0100 |
commit | 022851aba54d32831feaff13deb3d9943e130eee (patch) | |
tree | c1d6a8404dae393bd147790f6a9cf09c2f327b5a /cpukit/score/cpu/no_cpu/rtems/score/cpu.h | |
parent | bsps: Thread-local storage (TLS) for linkcmds (diff) | |
download | rtems-022851aba54d32831feaff13deb3d9943e130eee.tar.bz2 |
Add thread-local storage (TLS) support
Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
Diffstat (limited to 'cpukit/score/cpu/no_cpu/rtems/score/cpu.h')
-rw-r--r-- | cpukit/score/cpu/no_cpu/rtems/score/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h index f1f02edaf0..783da76dee 100644 --- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h +++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h @@ -932,13 +932,14 @@ uint32_t _CPU_ISR_Get_level( void ); * point thread. This is typically only used on CPUs where the * FPU may be easily disabled by software such as on the SPARC * where the PSR contains an enable FPU bit. + * @param[in] _tls_area The thread-local storage (TLS) area. * * Port Specific Information: * * XXX document implementation including references if appropriate */ #define _CPU_Context_Initialize( _the_context, _stack_base, _size, \ - _isr, _entry_point, _is_fp ) \ + _isr, _entry_point, _is_fp, _tls_area ) \ { \ } |