diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-01-16 15:12:44 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-01-16 15:12:44 +0000 |
| commit | ece004d72a6ef2968c56fb32295606642fd0b4c5 (patch) | |
| tree | 21b2d31bf21181c46a5f2db745742e6fff070e73 /cpukit/score/cpu/mips | |
| parent | 2006-01-16 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-ece004d72a6ef2968c56fb32295606642fd0b4c5.tar.bz2 | |
2006-01-16 Joel Sherrill <joel@OARcorp.com>
* rtems/score/cpu.h: Part of a large patch to improve Doxygen output.
As a side-effect, grammar and spelling errors were corrected, spacing
errors were address, and some variable names were improved.
Diffstat (limited to 'cpukit/score/cpu/mips')
| -rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 6 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/rtems/score/cpu.h | 9 |
2 files changed, 10 insertions, 5 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 841af237d8..09f6d4331d 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,9 @@ +2006-01-16 Joel Sherrill <joel@OARcorp.com> + + * rtems/score/cpu.h: Part of a large patch to improve Doxygen output. + As a side-effect, grammar and spelling errors were corrected, spacing + errors were address, and some variable names were improved. + 2005-11-18 Joel Sherrill <joel@OARcorp.com> * rtems/score/cpu.h: Eliminate use of unsigned32. diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h index ad40cbaf4f..219047a098 100644 --- a/cpukit/score/cpu/mips/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h @@ -26,7 +26,7 @@ * Transition Networks makes no representations about the suitability * of this software for any purpose. * - * COPYRIGHT (c) 1989-2001. + * COPYRIGHT (c) 1989-2006. * On-Line Applications Research Corporation (OAR). * * The license and distribution terms for this file may be @@ -146,8 +146,7 @@ extern "C" { * If TRUE, then the memory is allocated during initialization. * If FALSE, then the memory is allocated during initialization. * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE - * or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE. + * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. */ #define CPU_ALLOCATE_INTERRUPT_STACK FALSE @@ -695,7 +694,7 @@ extern unsigned int mips_interrupt_number_of_vectors; #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) /* - * Should be large enough to run all RTEMS tests. This insures + * Should be large enough to run all RTEMS tests. This ensures * that a "reasonable" small application should not have any problems. */ @@ -1174,7 +1173,7 @@ void _CPU_Context_restore_fp( * Some CPUs have special instructions which swap a 32-bit quantity in * a single instruction (e.g. i486). It is probably best to avoid * an "endian swapping control bit" in the CPU. One good reason is - * that interrupts would probably have to be disabled to insure that + * that interrupts would probably have to be disabled to ensure that * an interrupt does not try to access the same "chunk" with the wrong * endian. Another good reason is that on some CPUs, the endian bit * endianness for ALL fetches -- both code and data -- so the code |