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authorDaniel Hellstrom <daniel@gaisler.com>2014-06-04 11:23:34 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-09-10 14:06:08 +0200
commitf82752a474ee8157eafcb2f3192fb3ed8d3def9a (patch)
tree5aaa8ab0eb9676e90bf53ac15014c059ab93cc8b /cpukit/score/cpu/mips/rtems
parentbsps/arm: Fix get cache size (diff)
downloadrtems-f82752a474ee8157eafcb2f3192fb3ed8d3def9a.tar.bz2
Let CPU/BSP Fatal handler have access to source
Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
Diffstat (limited to 'cpukit/score/cpu/mips/rtems')
-rw-r--r--cpukit/score/cpu/mips/rtems/score/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h
index 392a995917..7fc639b520 100644
--- a/cpukit/score/cpu/mips/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/rtems/score/cpu.h
@@ -913,7 +913,7 @@ void _CPU_Context_Initialize(
* halts/stops the CPU.
*/
-#define _CPU_Fatal_halt( _error ) \
+#define _CPU_Fatal_halt( _source, _error ) \
do { \
unsigned int _level; \
_CPU_ISR_Disable(_level); \