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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-10 15:17:28 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-18 07:30:35 +0100 |
| commit | 408609f6b9cd8e03d3886b7c150efbf7e59b5fb0 (patch) | |
| tree | 0c4ec2f82334c0efb93f1222e4ee80a6ada166ce /cpukit/score/cpu/mips/rtems/score/cpu.h | |
| parent | score: Restrict task interrupt level to 0 on SMP (diff) | |
| download | rtems-408609f6b9cd8e03d3886b7c150efbf7e59b5fb0.tar.bz2 | |
score: Add _ISR_Is_enabled()
In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates
a level parameter and returns a boolean value.
Update #2811.
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/mips/rtems/score/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h index 4e1eba1ca6..3fe0b8d022 100644 --- a/cpukit/score/cpu/mips/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h @@ -699,6 +699,11 @@ uint32_t mips_interrupt_mask( void ); _xlevel = _scratch2; \ } while(0) +RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level ) +{ + return ( level & SR_INTERRUPT_ENABLE_BITS ) != 0; +} + /* * Map interrupt level in task mode onto the hardware that the CPU * actually provides. Currently, interrupt levels which do not |