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authorJoel Sherrill <joel.sherrill@OARcorp.com>2004-04-03 16:29:13 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2004-04-03 16:29:13 +0000
commit0c9eaefb7b330d3a016ae7505ffed169ae50e485 (patch)
tree3a9e4bd96088d49fa62703401cbe18ad2f156608 /cpukit/score/cpu/mips/rtems/score/cpu.h
parent2004-04-03 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
downloadrtems-0c9eaefb7b330d3a016ae7505ffed169ae50e485.tar.bz2
2004-04-03 Art Ferrer <arturo.b.ferrer@nasa.gov>
PR 598/bsps * cpu_asm.S, rtems/score/cpu.h: Add save of floating point status/control register on context switches. Missing this register was causing intermittent floating point errors.
Diffstat (limited to '')
-rw-r--r--cpukit/score/cpu/mips/rtems/score/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h
index a829d32254..5e104526f1 100644
--- a/cpukit/score/cpu/mips/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/rtems/score/cpu.h
@@ -419,6 +419,7 @@ typedef struct {
__MIPS_FPU_REGISTER_TYPE fp29;
__MIPS_FPU_REGISTER_TYPE fp30;
__MIPS_FPU_REGISTER_TYPE fp31;
+ __MIPS_FPU_REGISTER_TYPE fpcs;
#endif
} Context_Control_fp;