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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-16 13:27:00 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-16 13:42:27 +0200 |
| commit | 36655b870c09e090b515011961c36fabd3f70e37 (patch) | |
| tree | 057fafbd38141da93a2516657b9f9a84b7e6114f /cpukit/score/cpu/mips/cpu_asm.S | |
| parent | sparc: Prefer RTEMS_FATAL_SOURCE_EXCEPTION (diff) | |
| download | rtems-36655b870c09e090b515011961c36fabd3f70e37.tar.bz2 | |
cpukit: occured -> occurred
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/mips/cpu_asm.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S index 5692af22d7..327df4d2e9 100644 --- a/cpukit/score/cpu/mips/cpu_asm.S +++ b/cpukit/score/cpu/mips/cpu_asm.S @@ -750,7 +750,7 @@ _ISR_Handler_Exception: ** Note, if the exception vector returns, rely on it to have ** adjusted EPC so we will return to some correct address. If ** this is not done, we might get stuck in an infinite loop because - ** we'll return to the instruction where the exception occured and + ** we'll return to the instruction where the exception occurred and ** it could throw again. ** ** It is expected the only code using the exception processing is @@ -776,7 +776,7 @@ _ISR_Handler_Exception: beqz t4,excnodelay NOP - * it did, now see if the branch occured or not * + * it did, now see if the branch occurred or not * li t3,CAUSE_BT AND t4,t1,t3 beqz t4,excnobranch |