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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-12-19 16:43:34 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-12-19 16:43:34 +0000 |
| commit | c5333725bc33703ea2cbe1f36afa9713c0451648 (patch) | |
| tree | f217fa490147d4ddfc3235e56c623729f8ee8023 /cpukit/score/cpu/mips/cpu.c | |
| parent | 2000-12-19 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-c5333725bc33703ea2cbe1f36afa9713c0451648.tar.bz2 | |
2000-12-19 Joel Sherrill <joel@OARcorp.com>
* cpu.c: Do not read or write raw interrupt vector table if
we are on a CPU that does not have a %vbr register and the
BSP is configured as having the table in ROM.
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions