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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-06-05 14:30:07 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-06-05 14:30:07 +0000 |
commit | 2fd427c7926495b3e1ad3c7aaaa489f8cde95573 (patch) | |
tree | 7ff7f4fc896909274f626ceaf23693571cf3cd4e /cpukit/score/cpu/mips/ChangeLog | |
parent | 2008-06-05 Joel Sherrill <joel.sherrill@OARcorp.com> (diff) | |
download | rtems-2fd427c7926495b3e1ad3c7aaaa489f8cde95573.tar.bz2 |
2008-06-05 Joel Sherrill <joel.sherrill@OARcorp.com>
* rtems/score/cpu.h: Add CPU_SIMPLE_VECTORED_INTERRUPTS porting
parameter to indicate that the port uses the Simple Vectored
Interrupt model or the Programmable Interrupt Controller Model. The
PIC model is implemented primarily in the BSP and it is responsible
for all memory allocation.
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index da56fd86ea..5689ee26a9 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,11 @@ +2008-06-05 Joel Sherrill <joel.sherrill@OARcorp.com> + + * rtems/score/cpu.h: Add CPU_SIMPLE_VECTORED_INTERRUPTS porting + parameter to indicate that the port uses the Simple Vectored + Interrupt model or the Programmable Interrupt Controller Model. The + PIC model is implemented primarily in the BSP and it is responsible + for all memory allocation. + 2008-06-04 Joel Sherrill <joel.sherrill@OARcorp.com> * rtems/score/cpu.h: Use a constant for CPU_STACK_MINIMUM_SIZE so it |