diff options
| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2022-01-28 16:45:47 -0600 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2022-02-04 11:30:59 -0600 |
| commit | c6d8d1cb2b2c199a12fde25642bb6c322bb8e69e (patch) | |
| tree | 0a6a07c0cb6e0eef8339434710e8bea502629d6f /cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h | |
| parent | cpukit/microblaze: Add exception extensions (diff) | |
| download | rtems-c6d8d1cb2b2c199a12fde25642bb6c322bb8e69e.tar.bz2 | |
cpukit/microblaze: Clarify interrupt frame usage
Avoid use of magic numbers in favor of named constants and add MSR to
the interrupt frame so that thread dispatch can occur on exceptions as
well.
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h index 3d0167dd40..0573759d52 100644 --- a/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h @@ -49,7 +49,7 @@ */ #define CPU_PER_CPU_CONTROL_SIZE 0 -#define CPU_INTERRUPT_FRAME_SIZE 52 +#define CPU_INTERRUPT_FRAME_SIZE 56 #define MICROBLAZE_INTERRUPT_FRAME_R3 0 #define MICROBLAZE_INTERRUPT_FRAME_R4 4 @@ -64,6 +64,7 @@ #define MICROBLAZE_INTERRUPT_FRAME_R14 40 #define MICROBLAZE_INTERRUPT_FRAME_R15 44 #define MICROBLAZE_INTERRUPT_FRAME_R18 48 +#define MICROBLAZE_INTERRUPT_FRAME_MSR 52 #ifndef ASM |