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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-12-02 19:43:22 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-12-02 19:43:22 +0000 |
| commit | f4b7e2971038a736c72cdca78e32906dea516fca (patch) | |
| tree | fc5098365b5e6e5f7d2a3493018317c228a03914 /cpukit/score/cpu/m68k | |
| parent | Added asserts for unhandled conditions which need to result in error (diff) | |
| download | rtems-f4b7e2971038a736c72cdca78e32906dea516fca.tar.bz2 | |
Update from Chris Johns <cjohns@awa.com.au> to add better support for
68000 class CPUs.
Diffstat (limited to 'cpukit/score/cpu/m68k')
| -rw-r--r-- | cpukit/score/cpu/m68k/cpu.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/cpukit/score/cpu/m68k/cpu.c b/cpukit/score/cpu/m68k/cpu.c index f57fae6685..1c43c23379 100644 --- a/cpukit/score/cpu/m68k/cpu.c +++ b/cpukit/score/cpu/m68k/cpu.c @@ -31,6 +31,21 @@ void _CPU_Initialize( void (*thread_dispatch) /* ignored on this CPU */ ) { +#if ( M68K_HAS_VBR == 0 ) + /* fill the isr redirect table with the code to place the format/id + onto the stack */ + + unsigned32 slot; + + for (slot = 0; slot < CPU_INTERRUPT_NUMBER_OF_VECTORS; slot++) + { + _CPU_ISR_jump_table[slot].move_a7 = M68K_MOVE_A7; + _CPU_ISR_jump_table[slot].format_id = slot << 2; + _CPU_ISR_jump_table[slot].jmp = M68K_JMP; + _CPU_ISR_jump_table[slot].isr_handler = (unsigned32) 0xDEADDEAD; + } +#endif /* M68K_HAS_VBR */ + _CPU_Table = *cpu_table; } @@ -63,12 +78,13 @@ void _CPU_ISR_install_raw_handler( m68k_get_vbr( interrupt_table ); -#if ( M68K_HAS_VBR == 1) *old_handler = interrupt_table[ vector ]; + +#if ( M68K_HAS_VBR == 1 ) interrupt_table[ vector ] = new_handler; #else - *old_handler = *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10); - *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10) = new_handler; + _CPU_ISR_jump_table[vector].isr_handler = (unsigned32) new_handler; + interrupt_table[ vector ] = (proc_ptr) &_CPU_ISR_jump_table[vector]; #endif /* M68K_HAS_VBR */ } |