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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-01 14:40:51 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-01 14:40:51 +0000
commit5ef4fae6501eca4768139efb3cdce48a9e38bb0e (patch)
tree83d7f6849c3d19b11d46f3b58b99fe28f22d38b0 /cpukit/score/cpu/m68k
parentf177865318fcf1d6e809d9ec17b5e6da3827163e (diff)
downloadrtems-5ef4fae6501eca4768139efb3cdce48a9e38bb0e.tar.bz2
Merged patch from David Fiddes <D.J.Fiddes@hw.ac.uk> to add ColdFire
specific register macros and correct code in rtems.s.
Diffstat (limited to 'cpukit/score/cpu/m68k')
-rw-r--r--cpukit/score/cpu/m68k/asm.h10
-rw-r--r--cpukit/score/cpu/m68k/rtems/asm.h10
2 files changed, 18 insertions, 2 deletions
diff --git a/cpukit/score/cpu/m68k/asm.h b/cpukit/score/cpu/m68k/asm.h
index c8ea2ec095..456b213cb2 100644
--- a/cpukit/score/cpu/m68k/asm.h
+++ b/cpukit/score/cpu/m68k/asm.h
@@ -88,7 +88,15 @@
#define sr REG (sr)
#define vbr REG (vbr)
#define dfc REG (dfc)
-#define sfc REG(sfc)
+#define sfc REG (sfc)
+
+/* mcf52xx special regs */
+#define cacr REG (cacr)
+#define acr0 REG (acr0)
+#define acr1 REG (acr1)
+#define rambar0 REG (rambar0)
+#define mbar REG (mbar)
+
#define fp0 REG (fp0)
#define fp1 REG (fp1)
diff --git a/cpukit/score/cpu/m68k/rtems/asm.h b/cpukit/score/cpu/m68k/rtems/asm.h
index c8ea2ec095..456b213cb2 100644
--- a/cpukit/score/cpu/m68k/rtems/asm.h
+++ b/cpukit/score/cpu/m68k/rtems/asm.h
@@ -88,7 +88,15 @@
#define sr REG (sr)
#define vbr REG (vbr)
#define dfc REG (dfc)
-#define sfc REG(sfc)
+#define sfc REG (sfc)
+
+/* mcf52xx special regs */
+#define cacr REG (cacr)
+#define acr0 REG (acr0)
+#define acr1 REG (acr1)
+#define rambar0 REG (rambar0)
+#define mbar REG (mbar)
+
#define fp0 REG (fp0)
#define fp1 REG (fp1)