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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-10-12 12:50:43 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-10-12 12:50:43 +0000
commit6c6818678b12d6a1d473761f5e2d17e732aac4d2 (patch)
treef279aceda7e84259179830f7aa404ac400294915 /cpukit/score/cpu/m68k/rtems
parentchanged version to ss-20000929 (diff)
downloadrtems-6c6818678b12d6a1d473761f5e2d17e732aac4d2.tar.bz2
2000-10-12 John S Gwynne <jgwynne@mrcday.com>
* sim.h: These changes enable RTEMS to automatically generate the ram_init file used by gdb with the BDM patches. The 332 has on-board chip select lines (for RAM and FLASH) that must be configured before use of these peripherals. These patches parse data from start.c where the chip select lines are configured in the runtime executable and automatically generates the gdb initialization file using the same settings. A great time saver. A similar file, ram_init_FW (flash writable), is also generated that the flash programming tool uses. * BSP/start/start.c: Must be modified to support above. * BSP/start/ram_init.ld, BSP/start/ram_init.sed: New files.
Diffstat (limited to 'cpukit/score/cpu/m68k/rtems')
-rw-r--r--cpukit/score/cpu/m68k/rtems/m68k/sim.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/cpukit/score/cpu/m68k/rtems/m68k/sim.h b/cpukit/score/cpu/m68k/rtems/m68k/sim.h
index 9354412390..db2ec89d3a 100644
--- a/cpukit/score/cpu/m68k/rtems/m68k/sim.h
+++ b/cpukit/score/cpu/m68k/rtems/m68k/sim.h
@@ -68,16 +68,15 @@
/* SIM_CRB (SIM Control Register Block) base address of the SIM
control registers */
-/* not included in ram_init.h */
+#ifndef SIM_CRB
#if SIM_MM == 0
#define SIM_CRB 0x7ffa00
-#else
+#else /* SIM_MM */
#undef SIM_MM
#define SIM_MM 1
#define SIM_CRB 0xfffa00
-#endif
-/* end not included in ram_init.h */
-
+#endif /* SIM_MM */
+#endif /* SIM_CRB */
#define SIMCR SIM_VOLATILE_USHORT_POINTER(0x00 + SIM_CRB)