summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/lm32/rtems/score/cpu.h
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@OARcorp.com>2009-04-14 13:44:29 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2009-04-14 13:44:29 +0000
commit7c4c284c4af4551627097f914ce048245213c481 (patch)
treeb4ca21e9cb1f8a2896755f8ad1443001f2dbf2ee /cpukit/score/cpu/lm32/rtems/score/cpu.h
parentFix attribution. (diff)
downloadrtems-7c4c284c4af4551627097f914ce048245213c481.tar.bz2
2009-04-14 Michael Walle <michael@walle.cc>
* cpu.h: corrected the registers in Context_Control and in CPU_Interrupt_frame to correspond to the saved frame in cpu_asm.S Also switched on CPU_ISR_PASSES_FRAME_POINTER. * cpu_asm.S: Moved the restore part of _CPU_Context_switch for easier reading. Fixed _CPU_Context_restore, it now moves the argument and branches to a label in _CPU_Context_switch. Removed unnecessary saves of registers in context switch and irq handling. Rewrote irq code to call the C helper. Added some documentation * irq.c: New file derived from c4x and nios2.
Diffstat (limited to 'cpukit/score/cpu/lm32/rtems/score/cpu.h')
-rw-r--r--cpukit/score/cpu/lm32/rtems/score/cpu.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h
index 5ada499b95..44d1d23a16 100644
--- a/cpukit/score/cpu/lm32/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h
@@ -175,7 +175,7 @@ extern "C" {
*
* XXX document implementation including references if appropriate
*/
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER 1
/**
* @def CPU_HARDWARE_FP
@@ -462,8 +462,6 @@ extern "C" {
* to another.
*/
typedef struct {
- uint32_t r9;
- uint32_t r10;
uint32_t r11;
uint32_t r12;
uint32_t r13;
@@ -483,6 +481,7 @@ typedef struct {
uint32_t fp;
uint32_t sp;
uint32_t ra;
+ uint32_t ie;
} Context_Control;
/**
@@ -520,9 +519,11 @@ typedef struct {
uint32_t r6;
uint32_t r7;
uint32_t r8;
+ uint32_t r9;
+ uint32_t r10;
uint32_t ra;
- uint32_t gp;
uint32_t ba;
+ uint32_t ea;
} CPU_Interrupt_frame;
/**