score: Implement forced thread migration

The current implementation of task migration in RTEMS has some
implications with respect to the interrupt latency. It is crucial to
preserve the system invariant that a task can execute on at most one
processor in the system at a time. This is accomplished with a boolean
indicator in the task context. The processor architecture specific
low-level task context switch code will mark that a task context is no
longer executing and waits that the heir context stopped execution
before it restores the heir context and resumes execution of the heir
task. So there is one point in time in which a processor is without a
task. This is essential to avoid cyclic dependencies in case multiple
tasks migrate at once. Otherwise some supervising entity is necessary to
prevent life-locks. Such a global supervisor would lead to scalability
problems so this approach is not used. Currently the thread dispatch is
performed with interrupts disabled. So in case the heir task is
currently executing on another processor then this prolongs the time of
disabled interrupts since one processor has to wait for another
processor to make progress.

It is difficult to avoid this issue with the interrupt latency since
interrupts normally store the context of the interrupted task on its
stack. In case a task is marked as not executing we must not use its
task stack to store such an interrupt context. We cannot use the heir
stack before it stopped execution on another processor. So if we enable
interrupts during this transition we have to provide an alternative task
independent stack for this time frame. This issue needs further
investigation.

1 files changed, 22 insertions, 7 deletions

diff --git a/cpukit/score/cpu/i386/cpu_asm.S b/cpukit/score/cpu/i386/cpu_asm.S
index 73a4c143b4..cc08312f33 100644
--- a/cpukit/score/cpu/i386/cpu_asm.S
+++ b/cpukit/score/cpu/i386/cpu_asm.S
@@ -26,13 +26,12 @@
  * Format of i386 Register structure
  */
 
-.set REG_EFLAGS,  0
-.set REG_ESP,     REG_EFLAGS + 4
-.set REG_EBP,     REG_ESP + 4
-.set REG_EBX,     REG_EBP + 4
-.set REG_ESI,     REG_EBX + 4
-.set REG_EDI,     REG_ESI + 4
-.set SIZE_REGS,   REG_EDI + 4
+.set REG_EFLAGS,  I386_CONTEXT_CONTROL_EFLAGS_OFFSET
+.set REG_ESP,     I386_CONTEXT_CONTROL_ESP_OFFSET
+.set REG_EBP,     I386_CONTEXT_CONTROL_EBP_OFFSET
+.set REG_EBX,     I386_CONTEXT_CONTROL_EBX_OFFSET
+.set REG_ESI,     I386_CONTEXT_CONTROL_ESI_OFFSET
+.set REG_EDI,     I386_CONTEXT_CONTROL_EDI_OFFSET
 
         BEGIN_CODE
 
@@ -58,9 +57,25 @@ SYM (_CPU_Context_switch):
         movl      esi,REG_ESI(eax)         /* save source register */
         movl      edi,REG_EDI(eax)         /* save destination register */
 
+#ifdef RTEMS_SMP
+        /* Indicate that this context is no longer executing */
+        movb      $0, I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(eax)
+#endif
+
         movl      HEIRCONTEXT_ARG(esp),eax /* eax = heir threads context */
 
 restore:
+#ifdef RTEMS_SMP
+        /* Wait for context to stop execution if necessary */
+1:
+        movb      I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(eax), bl
+        testb     bl, bl
+        jne       1b
+
+        /* Indicate that this context is executing */
+        movb      $1, I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(eax)
+#endif
+
         pushl     REG_EFLAGS(eax)          /* push eflags */
         popf                               /* restore eflags */
         movl      REG_ESP(eax),esp         /* restore stack pointer */