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authorJan Sommer <jan.sommer@dlr.de>2020-07-22 14:41:51 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2020-07-29 11:39:02 +0200
commit21c7e3a41f1590b18c2c3f883e2b63e36cc409aa (patch)
treeb3f6fcb2afb0dc622316e53a0ef41e2177cab335 /cpukit/score/cpu/i386/cpu_asm.S
parentspmisc01: Include missing header file (diff)
downloadrtems-21c7e3a41f1590b18c2c3f883e2b63e36cc409aa.tar.bz2
i386: Fix possible race condition on first context restore
Make sure that the esp is restored before the eflags register. When the init task is initially restored, system interrupts are activated when the eflags register is loaded. If the esp register still points to an address in the interrupt stack area (from early system initlization) the ISR might overwrite its own stack. Closes #4031
Diffstat (limited to 'cpukit/score/cpu/i386/cpu_asm.S')
-rw-r--r--cpukit/score/cpu/i386/cpu_asm.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpukit/score/cpu/i386/cpu_asm.S b/cpukit/score/cpu/i386/cpu_asm.S
index 6031f6914e..23360959f5 100644
--- a/cpukit/score/cpu/i386/cpu_asm.S
+++ b/cpukit/score/cpu/i386/cpu_asm.S
@@ -83,9 +83,9 @@ SYM (_CPU_Context_switch):
.L_restore:
movl I386_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE(eax),ecx
movl ecx,PER_CPU_ISR_DISPATCH_DISABLE(edx)
+ movl REG_ESP(eax),esp /* restore stack pointer */
pushl REG_EFLAGS(eax) /* push eflags */
popf /* restore eflags */
- movl REG_ESP(eax),esp /* restore stack pointer */
movl REG_EBP(eax),ebp /* restore base pointer */
movl REG_EBX(eax),ebx /* restore ebx */
movl REG_ESI(eax),esi /* restore source register */