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| author | Till Straumann <strauman@slac.stanford.edu> | 2009-11-10 06:55:28 +0000 |
|---|---|---|
| committer | Till Straumann <strauman@slac.stanford.edu> | 2009-11-10 06:55:28 +0000 |
| commit | b02f4cc11f03d3425e3ce83daaa1d903c937b5b3 (patch) | |
| tree | 14b52f551fdcb427f9b3e0855c11914420349871 /cpukit/score/cpu/i386/cpu.c | |
| parent | 2009-11-10 Till Straumann <strauman@slac.stanford.edu> (diff) | |
| download | rtems-b02f4cc11f03d3425e3ce83daaa1d903c937b5b3.tar.bz2 | |
2009-11-09 Till Straumann <strauman@slac.stanford.edu>
* cpu.c, cpu_asm.S, rtems/score/cpu.h, sse_test.c:
Added experimental SSE support.
Diffstat (limited to 'cpukit/score/cpu/i386/cpu.c')
| -rw-r--r-- | cpukit/score/cpu/i386/cpu.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c index b150ad8f8d..e9c2dc64e0 100644 --- a/cpukit/score/cpu/i386/cpu.c +++ b/cpukit/score/cpu/i386/cpu.c @@ -56,9 +56,36 @@ void _CPU_Initialize(void) fp_context = &_CPU_Null_fp_context; +#ifdef __SSE__ + asm volatile( "fstcw %0":"=m"(fp_context->fpucw) ); +#else asm volatile( "fsave (%0)" : "=r" (fp_context) : "0" (fp_context) ); +#endif + } +#endif + +#ifdef __SSE__ + + asm volatile("stmxcsr %0":"=m"(fp_context->mxcsr)); + + /* The BSP must enable the SSE extensions (early). + * If any SSE instruction was already attempted + * then that crashed the system. + * As a courtesy, we double-check here but it + * may be too late (which is also why we don't + * enable SSE here). + */ + { + uint32_t cr4; + __asm__ __volatile__("mov %%cr4, %0":"=r"(cr4)); + if ( 0x600 != (cr4 & 0x600) ) { + printk("PANIC: RTEMS was compiled for SSE but BSP did not enable it (CR4: 0x%08x)\n", cr4); + while ( 1 ) { + __asm__ __volatile__("hlt"); + } + } } #endif } @@ -165,6 +192,9 @@ extern void rtems_exception_prologue_14(void); extern void rtems_exception_prologue_16(void); extern void rtems_exception_prologue_17(void); extern void rtems_exception_prologue_18(void); +#ifdef __SSE__ +extern void rtems_exception_prologue_19(void); +#endif static rtems_raw_irq_hdl tbl[] = { rtems_exception_prologue_0, @@ -186,6 +216,9 @@ static rtems_raw_irq_hdl tbl[] = { rtems_exception_prologue_16, rtems_exception_prologue_17, rtems_exception_prologue_18, +#ifdef __SSE__ + rtems_exception_prologue_19, +#endif }; void rtems_exception_init_mngt(void) |