summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/h8300/rtems/score/cpu.h
diff options
context:
space:
mode:
authorRalf Corsepius <ralf.corsepius@rtems.org>2004-12-10 06:58:05 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-12-10 06:58:05 +0000
commita58154f4f0007caa098460d28026c65c7a8494d1 (patch)
treef3ea0b140bd02713a8bd416c8744cd9db00f27b5 /cpukit/score/cpu/h8300/rtems/score/cpu.h
parent2004-12-10 Ralf Corsepius <ralf.corsepius@rtems.org> (diff)
downloadrtems-a58154f4f0007caa098460d28026c65c7a8494d1.tar.bz2
Cosmetics.
Diffstat (limited to '')
-rw-r--r--cpukit/score/cpu/h8300/rtems/score/cpu.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h
index 60cf75ad0b..d0d340e093 100644
--- a/cpukit/score/cpu/h8300/rtems/score/cpu.h
+++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h
@@ -614,7 +614,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define _CPU_Initialize_vectors()
/* COPE With Brain dead version of GCC distributed with Hitachi HIView Tools.
- Note requires ISR_Level be uint16_t or assembler croaks.
+ Note requires ISR_Level be uint16_t or assembler croaks.
*/
#if (__GNUC__ == 2 && __GNUC_MINOR__ == 7 )
@@ -632,7 +632,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
/*
- * Enable interrupts to the previois level (returned by _CPU_ISR_Disable).
+ * Enable interrupts to the previous level (returned by _CPU_ISR_Disable).
* This indicates the end of an RTEMS critical section. The parameter
* _level is not modified.
*/
@@ -684,7 +684,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
/*
- * Enable interrupts to the previois level (returned by _CPU_ISR_Disable).
+ * Enable interrupts to the previous level (returned by _CPU_ISR_Disable).
* This indicates the end of an RTEMS critical section. The parameter
* _level is not modified.
*