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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-01-28 12:10:08 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-04 10:06:35 +0100 |
| commit | 022851aba54d32831feaff13deb3d9943e130eee (patch) | |
| tree | c1d6a8404dae393bd147790f6a9cf09c2f327b5a /cpukit/score/cpu/bfin/rtems/score | |
| parent | bsps: Thread-local storage (TLS) for linkcmds (diff) | |
| download | rtems-022851aba54d32831feaff13deb3d9943e130eee.tar.bz2 | |
Add thread-local storage (TLS) support
Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
Diffstat (limited to 'cpukit/score/cpu/bfin/rtems/score')
| -rw-r--r-- | cpukit/score/cpu/bfin/rtems/score/cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h index 1af3f81f81..a8c60a5c44 100644 --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h @@ -817,6 +817,7 @@ uint32_t _CPU_ISR_Get_level( void ); * point thread. This is typically only used on CPUs where the * FPU may be easily disabled by software such as on the SPARC * where the PSR contains an enable FPU bit. + * @param[in] tls_area is the thread-local storage (TLS) area * * Port Specific Information: * @@ -828,7 +829,8 @@ void _CPU_Context_Initialize( uint32_t size, uint32_t new_level, void *entry_point, - bool is_fp + bool is_fp, + void *tls_area ); /** |