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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2011-04-20 20:19:18 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2011-04-20 20:19:18 +0000 |
| commit | 87fbfec5be385c32dc832ca702284ddf09746b34 (patch) | |
| tree | cb02aae7b23fa2a557e745fe9a8fbed6225e83cd /cpukit/score/cpu/bfin/rtems/score/cpu.h | |
| parent | Regenerate. (diff) | |
| download | rtems-87fbfec5be385c32dc832ca702284ddf09746b34.tar.bz2 | |
2011-04-20 Rohan Kangralkar <rkangral@ece.neu.edu>
PR 1781/bsps
* bfin/rtems/bf52x.h: This file defines basic MMR for the Blackfin
52x CPU. The MMR have been taken from the ADSP-BF52x Blackfin
Processor Hardware Reference from Analog Devices. Mentioned
Chapters refer to this Documentation.
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/bfin/rtems/score/cpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h index f64b8e50ce..cecc3ec8f7 100644 --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h @@ -625,7 +625,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * * XXX document implementation including references if appropriate */ -#define CPU_STACK_MINIMUM_SIZE (1024*4) +#define CPU_STACK_MINIMUM_SIZE (1024*8) /** * CPU's worst alignment requirement for data types on a byte boundary. This @@ -693,7 +693,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * * XXX document implementation including references if appropriate */ -#define CPU_STACK_ALIGNMENT 0 +#define CPU_STACK_ALIGNMENT 8 /* * ISR handler macros |