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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-19 12:53:34 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-23 14:14:04 +0200 |
commit | 3a646426aa421ab3e229ec483d8b29f2f56c29ac (patch) | |
tree | dcd723d79a9c5670ef553d01d7e572f93c4e616f /cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | |
parent | score: Add _CPU_Instruction_no_operation() (diff) | |
download | rtems-3a646426aa421ab3e229ec483d8b29f2f56c29ac.tar.bz2 |
score: Add _CPU_Instruction_illegal()
On some architectures/simulators it is difficult to provoke an
exception with misaligned or illegal data loads. Use an illegal
instruction instead.
Update #3433.
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h index d007a7982b..b856349db3 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h @@ -106,6 +106,11 @@ void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); +RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) +{ + __asm__ volatile ( "udf" ); +} + RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) { __asm__ volatile ( "nop" ); |