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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-19 14:59:51 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:58:16 +0200 |
| commit | c8df844cf3bddde0221614843c97cb6c950cdba9 (patch) | |
| tree | 67101cb39d5bdd406f785d33629703e5a876ed75 /cpukit/score/cpu/arm/include/rtems/score/cpu.h | |
| parent | console: Add missing return status (diff) | |
| download | rtems-c8df844cf3bddde0221614843c97cb6c950cdba9.tar.bz2 | |
score: Add CPU_INTERRUPT_STACK_ALIGNMENT
Add CPU port define for the interrupt stack alignment. The alignment
should take the stack ABI and the cache line size into account.
Update #3459.
Diffstat (limited to 'cpukit/score/cpu/arm/include/rtems/score/cpu.h')
| -rw-r--r-- | cpukit/score/cpu/arm/include/rtems/score/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h index f5827b4fc6..3f06c036f0 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h @@ -165,6 +165,8 @@ /* AAPCS, section 5.2.1.2, Stack constraints at a public interface */ #define CPU_STACK_ALIGNMENT 8 +#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES + /* * Bitfield handler macros. * |