diff options
author | Karel Gardas <karel@functional.vision> | 2023-03-15 19:15:51 +0100 |
---|---|---|
committer | Karel Gardas <karel@functional.vision> | 2023-07-14 12:38:14 +0200 |
commit | 0e4e9dd42169ba6e7bb086b6b863283c63d81bdb (patch) | |
tree | e4ebf4f2036e200cd7b7f186749c0a7bc31ec7ae /cpukit/score/cpu/arm/include/rtems/score/armv7m.h | |
parent | bsp/leon3: Simplify shutdown (diff) | |
download | rtems-0e4e9dd42169ba6e7bb086b6b863283c63d81bdb.tar.bz2 |
score/arm: improve printed exception information for Cortex-Mx CPUs
Sponsored-By: Precidata
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/arm/include/rtems/score/armv7m.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/armv7m.h b/cpukit/score/cpu/arm/include/rtems/score/armv7m.h index 0f129f1d2e..7fa48b3aa5 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/armv7m.h +++ b/cpukit/score/cpu/arm/include/rtems/score/armv7m.h @@ -159,8 +159,19 @@ typedef struct { #define ARMV7M_SCB_SHCSR_MEMFAULTENA (1U << 16) uint32_t shcsr; +#define ARMV7M_SCB_CFSR_MMFSR_MASK 0xff +#define ARMV7M_SCB_CFSR_MMFSR_GET(n) (n & ARMV7M_SCB_CFSR_MMFSR_MASK) +#define ARMV7M_SCB_CFSR_BFSR_MASK 0xff00 +#define ARMV7M_SCB_CFSR_BFSR_GET(n) (n & ARMV7M_SCB_CFSR_BFSR_MASK) +#define ARMV7M_SCB_CFSR_UFSR_MASK 0xffff0000 +#define ARMV7M_SCB_CFSR_UFSR_GET(n) (n & ARMV7M_SCB_CFSR_UFSR_MASK) uint32_t cfsr; + +#define ARMV7M_SCB_HFSR_VECTTBL_MASK 0x2 +#define ARMV7M_SCB_HFSR_FORCED_MASK (1U << 30) +#define ARMV7M_SCB_HFSR_DEBUGEVT_MASK (1U << 31) uint32_t hfsr; + uint32_t dfsr; uint32_t mmfar; uint32_t bfar; |