summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/arm/cpu_asm.S
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2022-03-08 16:56:49 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2022-03-09 21:11:10 +0100
commit32f0f11a68d3aa521f0398c9b8eec3d47f114c5e (patch)
tree672d1bd028d0e8c625dbe75db318050528f7c4b4 /cpukit/score/cpu/arm/cpu_asm.S
parentbsp/altera-cyclone-v: fix the creation of reserved memory regions (diff)
downloadrtems-32f0f11a68d3aa521f0398c9b8eec3d47f114c5e.tar.bz2
SMP: Fix start multitasking for some targets
The previous SMP multitasking start assumed that the initial heir thread of a processor starts execution in _Thread_Handler(). The _Thread_Handler() sets the interrupt state explicitly by _ISR_Set_level() before it calls the thread entry. Under certain timing conditions, processors may perform an initial context switch to a thread which already executes its thread body (see smptests/smpstart01). In this case, interrupts are disabled after the context switch on targets which do not save/restore the interrupt state during a context switch (aarch64, arm, and riscv). Close #4627.
Diffstat (limited to 'cpukit/score/cpu/arm/cpu_asm.S')
-rw-r--r--cpukit/score/cpu/arm/cpu_asm.S12
1 files changed, 12 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/cpu_asm.S b/cpukit/score/cpu/arm/cpu_asm.S
index 54d6f70b0d..d52a43f70d 100644
--- a/cpukit/score/cpu/arm/cpu_asm.S
+++ b/cpukit/score/cpu/arm/cpu_asm.S
@@ -182,6 +182,18 @@ DEFINE_FUNCTION_ARM(_CPU_Context_restore)
str r5, [r2, #PER_CPU_OFFSET_EXECUTING]
b .L_check_is_executing
+
+DEFINE_FUNCTION_ARM(_ARM_Start_multitasking)
+ mov r1, r0
+ GET_SELF_CPU_CONTROL r2
+
+ /* Switch the stack to the temporary interrupt stack of this processor */
+ add sp, r2, #(PER_CPU_INTERRUPT_FRAME_AREA + CPU_INTERRUPT_FRAME_SIZE)
+
+ /* Enable IRQ interrupts */
+ cpsie i
+
+ b .L_check_is_executing
#endif
#endif /* ARM_MULTILIB_ARCH_V4 */