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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-01-17 08:11:48 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-01-17 08:12:15 +0100 |
| commit | 41a1903dd97b3acd1e290c936de4d865d35a0fe4 (patch) | |
| tree | 3240d8dd25631f519c9481ffe3c9da02b58e3b91 /cpukit/score/cpu/arm/arm_exc_interrupt.S | |
| parent | arm: Rework per-CPU control in interrupt handling (diff) | |
| download | rtems-41a1903dd97b3acd1e290c936de4d865d35a0fe4.tar.bz2 | |
arm: Avoid duplicate move from CPSR
Update #4579.
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/arm/arm_exc_interrupt.S | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/cpukit/score/cpu/arm/arm_exc_interrupt.S b/cpukit/score/cpu/arm/arm_exc_interrupt.S index 82f7a08fb8..a867ee6b48 100644 --- a/cpukit/score/cpu/arm/arm_exc_interrupt.S +++ b/cpukit/score/cpu/arm/arm_exc_interrupt.S @@ -138,9 +138,6 @@ _ARMV4_Exception_interrupt: /* Restore stack pointer */ mov sp, NON_VOLATILE_SCRATCH - /* Save CPSR in non-volatile register */ - mrs NON_VOLATILE_SCRATCH, CPSR - /* Decrement levels and determine thread dispatch state */ eor r1, r1, r12 sub r12, r12, #1 @@ -159,9 +156,11 @@ _ARMV4_Exception_interrupt: cmp r1, #0 bne .Lthread_dispatch_done - /* Thread dispatch */ + /* Save CPSR in non-volatile register */ mrs NON_VOLATILE_SCRATCH, CPSR + /* Thread dispatch */ + .Ldo_thread_dispatch: /* Set ISR dispatch disable and thread dispatch disable level to one */ |