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author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-09-23 14:00:29 -0500 |
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committer | Joel Sherrill <joel@rtems.org> | 2021-10-01 12:52:41 -0500 |
commit | ccd1c5e560aaee7398e28d9e54d3e5f9f1b834f3 (patch) | |
tree | 008683d745b40bad2bac8e49c3d6f896d858b3a5 /cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S | |
parent | score: Add Thread_queue_Deadlock_status (diff) | |
download | rtems-ccd1c5e560aaee7398e28d9e54d3e5f9f1b834f3.tar.bz2 |
cpukit/aarch64: Use correct context register sets
Context validation for AArch64 was ported from the ARM implementation
without a reinterpretation of the actual requirements. The spcontext01
test just happened to pass because the set of scratch registers in ARM
is a subset of the scratch registers in AArch64.
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S b/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S index 2be5ce69ff..73472b81ac 100644 --- a/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S +++ b/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S @@ -90,10 +90,29 @@ FUNCTION_ENTRY(_CPU_Context_volatile_clobber) clobber_vfp_register d31 #endif /* AARCH64_MULTILIB_VFP */ +/* + * According to the AAPCS64, X0-X18 and X29 are caller-saved registers. X0 is + * already being clobbered. + */ clobber_register x1 clobber_register x2 clobber_register x3 + clobber_register x4 + clobber_register x5 + clobber_register x6 + clobber_register x7 + clobber_register x8 + clobber_register x9 + clobber_register x10 + clobber_register x11 clobber_register x12 + clobber_register x13 + clobber_register x14 + clobber_register x15 + clobber_register x16 + clobber_register x17 + clobber_register x18 + clobber_register x29 ret |