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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-06-12 19:57:02 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-06-12 19:57:02 +0000 |
commit | 8ef38186faea3d9b5e6f0f1242f668cb7e7a3d52 (patch) | |
tree | 9253f150814c99167239f7c2cc850cdd9d92c003 /cpukit/libcsupport/src/malloc.c | |
parent | Ensure that when -msoft-float is specified for multilib builds, that (diff) | |
download | rtems-8ef38186faea3d9b5e6f0f1242f668cb7e7a3d52.tar.bz2 |
Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine Gauthier
<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860
Diffstat (limited to 'cpukit/libcsupport/src/malloc.c')
-rw-r--r-- | cpukit/libcsupport/src/malloc.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/cpukit/libcsupport/src/malloc.c b/cpukit/libcsupport/src/malloc.c index 08660d75cc..dc6824891a 100644 --- a/cpukit/libcsupport/src/malloc.c +++ b/cpukit/libcsupport/src/malloc.c @@ -418,5 +418,27 @@ void _free_r( { free( ptr ); } + + +/* + * rtems_cache_aligned_malloc + * + * DESCRIPTION: + * + * This function is used to allocate storage that spans an + * integral number of cache blocks. + */ +RTEMS_INLINE_ROUTINE void * rtems_cache_aligned_malloc ( + size_t nbytes +) +{ + /* + * Arrange to have the user storage start on the first cache + * block beyond the header. + */ + return (void *) ((((unsigned long) malloc( nbytes + _CPU_DATA_CACHE_ALIGNMENT - 1 )) + + _CPU_DATA_CACHE_ALIGNMENT - 1 ) &(~(_CPU_DATA_CACHE_ALIGNMENT - 1)) ); +} + #endif |