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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-08-09 07:59:13 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-08-26 07:24:43 +0200 |
| commit | aa7b76e98b9e73d9b5061a9d00a9a8b23a4480ce (patch) | |
| tree | f9233617e5a191a9f8c5c9a99dd944909c4ce4ca /cpukit/dev | |
| parent | dev/sc16is752: Do FIFO reset separately (diff) | |
| download | rtems-aa7b76e98b9e73d9b5061a9d00a9a8b23a4480ce.tar.bz2 | |
dev/sc16is752: Set TLS to zero
Ensures that the FCR values are used.
Diffstat (limited to 'cpukit/dev')
| -rw-r--r-- | cpukit/dev/serial/sc16is752.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/cpukit/dev/serial/sc16is752.c b/cpukit/dev/serial/sc16is752.c index a4dfeb7ee6..d1065a33cf 100644 --- a/cpukit/dev/serial/sc16is752.c +++ b/cpukit/dev/serial/sc16is752.c @@ -113,6 +113,18 @@ static void set_efr(sc16is752_context *ctx, uint8_t efr) write_reg(ctx, SC16IS752_LCR, &ctx->lcr, 1); } +static void set_tlr(sc16is752_context *ctx, uint8_t tlr) +{ + uint8_t mcr; + + read_reg(ctx, SC16IS752_MCR, &mcr, 1); + mcr |= SC16IS752_MCR_TCR_TLR; + write_reg(ctx, SC16IS752_MCR, &mcr, 1); + write_reg(ctx, SC16IS752_TLR, &tlr, 1); + mcr &= ~SC16IS752_MCR_TCR_TLR; + write_reg(ctx, SC16IS752_MCR, &mcr, 1); +} + static bool set_baud(sc16is752_context *ctx, rtems_termios_baud_t baud) { uint32_t freq = ctx->input_frequency; @@ -257,6 +269,8 @@ static bool sc16is752_first_open( | SC16IS752_FCR_TX_FIFO_TRG_32; write_reg(ctx, SC16IS752_FCR, &fcr, 1); + set_tlr(ctx, 0); + ctx->ier = SC16IS752_IER_RHR; write_reg(ctx, SC16IS752_IER, &ctx->ier, 1); |