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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-06-14 07:35:21 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-06-14 07:35:21 +0200 |
| commit | 6ff1da40c7688a880920c3f4b0f1d530775c315c (patch) | |
| tree | 37f2f046bbba7779101efcfc72d75089214715be /cpukit/dev/serial | |
| parent | bsp/atsam: Do not disable the WDT (diff) | |
| download | rtems-6ff1da40c7688a880920c3f4b0f1d530775c315c.tar.bz2 | |
dev/sc16is752: Add RS485 mode variants
Diffstat (limited to 'cpukit/dev/serial')
| -rw-r--r-- | cpukit/dev/serial/sc16is752-regs.h | 3 | ||||
| -rw-r--r-- | cpukit/dev/serial/sc16is752.c | 20 |
2 files changed, 19 insertions, 4 deletions
diff --git a/cpukit/dev/serial/sc16is752-regs.h b/cpukit/dev/serial/sc16is752-regs.h index b07e489a3e..b74f5aa84a 100644 --- a/cpukit/dev/serial/sc16is752-regs.h +++ b/cpukit/dev/serial/sc16is752-regs.h @@ -68,6 +68,8 @@ extern "C" { #define SC16IS752_EFCR_RS485_ENABLE (1u << 0) #define SC16IS752_EFCR_RX_DISABLE (1u << 1) #define SC16IS752_EFCR_TX_DISABLE (1u << 2) +#define SC16IS752_EFCR_RTSCON (1u << 4) +#define SC16IS752_EFCR_RTSINVER (1u << 5) /* IER */ #define SC16IS752_IER_RHR (1u << 0) @@ -91,6 +93,7 @@ extern "C" { #define SC16IS752_LCR_2_STOP_BIT (1u << 2) #define SC16IS752_LCR_SET_PARITY (1u << 3) #define SC16IS752_LCR_EVEN_PARITY (1u << 4) +#define SC16IS752_LCR_BREAK (1u << 5) #define SC16IS752_LCR_ENABLE_DIVISOR (1u << 7) /* LSR */ diff --git a/cpukit/dev/serial/sc16is752.c b/cpukit/dev/serial/sc16is752.c index a58b87bfb7..5384563abe 100644 --- a/cpukit/dev/serial/sc16is752.c +++ b/cpukit/dev/serial/sc16is752.c @@ -212,6 +212,7 @@ static bool sc16is752_first_open( { bool ok; uint8_t fcr; + uint8_t efcr; (void)args; sc16is752_context *ctx = (sc16is752_context *)base; @@ -223,12 +224,23 @@ static bool sc16is752_first_open( return ok; } - if (ctx->mode == SC16IS752_MODE_RS485) { - ctx->efcr = SC16IS752_EFCR_RS485_ENABLE; - } else { - ctx->efcr = 0; + efcr = 0; + + switch (ctx->mode) { + case SC16IS752_MODE_RS485_RTS_INV: + efcr |= SC16IS752_EFCR_RTSINVER; + /* Fall through */ + case SC16IS752_MODE_RS485_RTS: + efcr |= SC16IS752_EFCR_RTSCON; + /* Fall through */ + case SC16IS752_MODE_RS485: + efcr |= SC16IS752_EFCR_RS485_ENABLE; + break; + default: + break; } + ctx->efcr = efcr; write_reg(ctx, SC16IS752_FCR, &ctx->efcr, 1); fcr = SC16IS752_FCR_FIFO_EN |