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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-10 18:08:56 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-10 18:08:56 +0000 |
| commit | cef2fb5fda58e872b9065fa2b6db7a881336aaf4 (patch) | |
| tree | db21d05f40b358cda57101e5b7646f812c6b2de7 /c | |
| parent | Patch from Eric Valette <valette@crf.canon.fr> and Emmanuel Raguet (diff) | |
| download | rtems-cef2fb5fda58e872b9065fa2b6db7a881336aaf4.tar.bz2 | |
Last minute cleanup patch to close comment from Eric Valette
<valette@crf.canon.fr>.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/librdbg/powerpc/rdbg_cpu_asm.S | 2 | ||||
| -rw-r--r-- | c/src/librdbg/src/powerpc/rdbg_cpu_asm.S | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/c/src/lib/librdbg/powerpc/rdbg_cpu_asm.S b/c/src/lib/librdbg/powerpc/rdbg_cpu_asm.S index ef1a43385d..d45d6b52da 100644 --- a/c/src/lib/librdbg/powerpc/rdbg_cpu_asm.S +++ b/c/src/lib/librdbg/powerpc/rdbg_cpu_asm.S @@ -29,7 +29,7 @@ SYM (copyback_data_cache_and_invalidate_instr_cache): addi r6, r0, PPC_CACHE_ALIGNMENT /* r5 = last address to handle */ add r5,r3,r4 - /* r3 = cache_align(r3, PPC_CACHE_ALIGNMENT) + /* r3 = cache_align(r3, PPC_CACHE_ALIGNMENT) */ subi r0,r6,1 andc r3,r3,r0 /* R4 = R3 = copy of first address */ diff --git a/c/src/librdbg/src/powerpc/rdbg_cpu_asm.S b/c/src/librdbg/src/powerpc/rdbg_cpu_asm.S index ef1a43385d..d45d6b52da 100644 --- a/c/src/librdbg/src/powerpc/rdbg_cpu_asm.S +++ b/c/src/librdbg/src/powerpc/rdbg_cpu_asm.S @@ -29,7 +29,7 @@ SYM (copyback_data_cache_and_invalidate_instr_cache): addi r6, r0, PPC_CACHE_ALIGNMENT /* r5 = last address to handle */ add r5,r3,r4 - /* r3 = cache_align(r3, PPC_CACHE_ALIGNMENT) + /* r3 = cache_align(r3, PPC_CACHE_ALIGNMENT) */ subi r0,r6,1 andc r3,r3,r0 /* R4 = R3 = copy of first address */ |