summaryrefslogtreecommitdiffstats
path: root/c
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-03-01 18:08:53 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-03-01 18:08:53 +0000
commitb6f9b5f1fe0082d7e44dbc0f626bf6bf1473d5df (patch)
tree8fa44359e20000be8abed22b97f1b0a5a265cf6f /c
parentBSP now compiles and links with CAVSL board information. This includes (diff)
downloadrtems-b6f9b5f1fe0082d7e44dbc0f626bf6bf1473d5df.tar.bz2
Added routines to get and set C3x IOF register. The code is conditionally
compiled and there is no comparable code for the C4x.
Diffstat (limited to 'c')
-rw-r--r--c/src/exec/score/cpu/c4x/c4xio.h84
1 files changed, 71 insertions, 13 deletions
diff --git a/c/src/exec/score/cpu/c4x/c4xio.h b/c/src/exec/score/cpu/c4x/c4xio.h
index 5baba149bb..f85f461ebc 100644
--- a/c/src/exec/score/cpu/c4x/c4xio.h
+++ b/c/src/exec/score/cpu/c4x/c4xio.h
@@ -8,20 +8,9 @@
#define __C4XIO_h
/*
- * The following section of C4x timer code is based on C40 specific
- * timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
- * only C3x/C4x difference spotted was the address of the timer.
- * The names have been changed to be more RTEMS like.
+ * Address defines
*/
-struct c4x_timer {
- volatile int tcontrol;
- volatile int r1[3];
- volatile int tcounter;
- volatile int r2[3];
- volatile int tperiod;
-};
-
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
@@ -29,8 +18,51 @@ struct c4x_timer {
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
+/* XXX how portable */
+
+/* C32 Internal Control Registers */
+#define C4X_STRB0_REG 0x808064
+#define C4X_STRB1_REG 0x808068
+#define C4X_IOSTRB_REG 0x808060
+
+/* C32 Internal RAM Locations */
+/* XXX how long */
+#define C4X_RAM_BLK_0 0x87fe00
+#define C4X_RAM_BLK_1 0x87ff00
+
+/*
+ * Data Structures to Overlay the Peripherals on the CPU
+ */
+
+struct c4x_timer {
+ volatile int tcontrol;
+ volatile int r1[3];
+ volatile int tcounter;
+ volatile int r2[3];
+ volatile int tperiod;
+};
+
+
+
+
+/*
+ * Timer Support Routines
+ *
+ * The following section of C4x timer code is based on C40 specific
+ * timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
+ * only C3x/C4x difference spotted was the address of the timer.
+ * The names have been changed to be more RTEMS like.
+ */
+
+#define c4x_timer_get_control( _timer ) (volatile int)(_timer->tcontrol)
+
+#define c4x_timer_set_control( _timer, _value ) \
+ do { \
+ (volatile int)(_timer->tcontrol) = _value; \
+ } while (0);
+
#define c4x_timer_start( _timer ) \
- _timer->tcontrol=0x02c1
+ c4x_timer_set_control(_timer, 0x02c1 )
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
@@ -48,5 +80,31 @@ struct c4x_timer {
(volatile int)(_timer->tperiod) = _value; \
} while (0);
+/*
+ * IO Flags
+ *
+ * NOTE: iof on c3x, iiof on c4x
+ */
+
+#ifdef _TMS320C40
+
+#else
+
+static inline unsigned32 c3x_get_iof( void )
+{
+ register unsigned32 iof_value;
+
+ __asm__ volatile ("ldi iof, %0" : "=r" (iof_value));
+ return iof_value;
+}
+
+static inline void c3x_set_iof( unsigned32 value )
+{
+ __asm__ volatile ("ldi %0,iof" : : "g" (value) : "iof", "cc");
+}
+
+#endif
+
+
#endif
/* end if include file */