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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-02-05 21:06:13 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-02-05 21:06:13 +0000
commit0ab873495a2f232454a361c5edf8458628619252 (patch)
tree1b094813370c4a63e9c1dd8bc157fbc2235e8ff1 /c
parenta37b8f95b71fbf7c3b36ad1db57345a447a1e0c2 (diff)
downloadrtems-0ab873495a2f232454a361c5edf8458628619252.tar.bz2
2001-02-05 Joel Sherrill <joel@OARcorp.com>
* isr_entries.S: Removed comment incorrectly indicating this file was cpu_asm.S. * vectorexceptions.c (mips_dump_exception_frame): New routine broken out from default exception handler.
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libcpu/mips/ChangeLog7
-rw-r--r--c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S1
-rw-r--r--c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c29
3 files changed, 22 insertions, 15 deletions
diff --git a/c/src/lib/libcpu/mips/ChangeLog b/c/src/lib/libcpu/mips/ChangeLog
index 3f288ed994..3f5648ba62 100644
--- a/c/src/lib/libcpu/mips/ChangeLog
+++ b/c/src/lib/libcpu/mips/ChangeLog
@@ -1,3 +1,10 @@
+2001-02-05 Joel Sherrill <joel@OARcorp.com>
+
+ * isr_entries.S: Removed comment incorrectly indicating this
+ file was cpu_asm.S.
+ * vectorexceptions.c (mips_dump_exception_frame): New routine
+ broken out from default exception handler.
+
2001-02-01 Greg Menke <gregory.menke@gsfc.nasa.gov>
* mongoosev/vectorisrs/vectorisrs.c,
diff --git a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S
index 8fe31cd6e2..e27b35e984 100644
--- a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S
+++ b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S
@@ -10,7 +10,6 @@
*
* $Id$
*/
-/* @(#)cpu_asm.S 08/20/96 1.15 */
#include <asm.h>
#include "iregdef.h"
diff --git a/c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c b/c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c
index 147cf7a999..f755583705 100644
--- a/c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c
+++ b/c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c
@@ -65,12 +65,25 @@ struct regdef dumpregs[]= {
{ R_EPC,"R_EPC"}, { -1, NULL }
};
+void mips_dump_exception_frame( CPU_Interrupt_frame *frame )
+{
+ unsigned int *frame_u32;
+ int i, j;
+
+ frame_u32 = (unsigned32 *)frame;
+ for(i=0; dumpregs[i].offset > -1; i++)
+ {
+ printk(" %s", dumpregs[i].name);
+ for(j=0; j< 7-strlen(dumpregs[i].name); j++) printk(" ");
+ printk(" %08X%c", frame_u32[dumpregs[i].offset], (i%3) ? '\t' : '\n' );
+ }
+ printk( "\n" );
+}
void mips_default_exception_code_handler( int exc, CPU_Interrupt_frame *frame )
{
unsigned int sr;
unsigned int cause;
- int i, j;
mips_get_sr( sr );
mips_get_cause( cause );
@@ -78,20 +91,11 @@ void mips_default_exception_code_handler( int exc, CPU_Interrupt_frame *frame )
printk( "Unhandled exception %d\n", exc );
printk( "sr: 0x%08x cause: 0x%08x --> %s\n", sr, cause,
cause_strings[(cause >> 2) &0x1f] );
-
- for(i=0; dumpregs[i].offset > -1; i++)
- {
- printk(" %s", dumpregs[i].name);
- for(j=0; j< 7-strlen(dumpregs[i].name); j++) printk(" ");
- printk(" %08X\n", frame->regs[dumpregs[i].offset] );
- }
+ mips_dump_exception_frame( frame );
rtems_fatal_error_occurred(1);
}
-
-
-
#define CALL_EXC(_vector,_frame) \
do { \
if ( _ISR_Vector_table[_vector] ) \
@@ -100,9 +104,6 @@ void mips_default_exception_code_handler( int exc, CPU_Interrupt_frame *frame )
mips_default_exception_code_handler( _vector, _frame ); \
} while(0)
-
-
-
/*
* There are constants defined for these but they should basically
* all be close to the same set.