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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-30 16:51:10 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-30 16:51:10 +0000 |
| commit | 0cec037ece6d0c130481b6431f7867042f1c8687 (patch) | |
| tree | 5dda4bcda883e1e30af851a357956aaba3c5ffbd /c | |
| parent | 2007-11-30 Daniel Hellstrom <daniel@gaisler.com> (diff) | |
| download | rtems-0cec037ece6d0c130481b6431f7867042f1c8687.tar.bz2 | |
2007-11-30 Daniel Hellstrom <daniel@gaisler.com>
* rasta/rasta.c: LEON2 PCI RASTA driver. Changes RASTA PCI interrupt to
5 from 4. This is to avoid conflict with the LAN9C111 network MAC
driver using interrupt 4.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/sparc/leon2/ChangeLog | 6 | ||||
| -rw-r--r-- | c/src/lib/libbsp/sparc/leon2/rasta/rasta.c | 8 |
2 files changed, 12 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/sparc/leon2/ChangeLog b/c/src/lib/libbsp/sparc/leon2/ChangeLog index 948f80b215..721cb0ad5c 100644 --- a/c/src/lib/libbsp/sparc/leon2/ChangeLog +++ b/c/src/lib/libbsp/sparc/leon2/ChangeLog @@ -1,3 +1,9 @@ +2007-11-30 Daniel Hellstrom <daniel@gaisler.com> + + * rasta/rasta.c: LEON2 PCI RASTA driver. Changes RASTA PCI interrupt to + 5 from 4. This is to avoid conflict with the LAN9C111 network MAC + driver using interrupt 4. + 2007-09-12 Daniel Hellstrom <daniel@gaisler.com> * leon_smc91111/leon_smc91111.c: LEON2 SMC91111 initialization: PIO diff --git a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c index 9e6ec8fb27..12b86d31a8 100644 --- a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c +++ b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c @@ -1,3 +1,7 @@ +/* + * $Id$ + */ + #include <rtems/bspIo.h> #include <pci.h> #include <rasta.h> @@ -12,7 +16,7 @@ /* If RASTA_SRAM is defined SRAM will be used, else SDRAM */ /*#define RASTA_SRAM 1*/ -#define RASTA_IRQ 4 +#define RASTA_IRQ 5 /* Offset from 0x80000000 (dual bus version) */ #define AHB1_IOAREA_BASE_ADDR 0x80100000 @@ -288,7 +292,7 @@ int rasta_register(void) /* Configure AT697 ioport bit 7 to input pci irq */ regs->PIO_Direction &= ~(1<<7); - regs->PIO_Interrupt = 0x87; /* level sensitive */ + regs->PIO_Interrupt |= (0x87<<8); /* level sensitive */ apb_base[0x100] |= 0x40000000; /* Set GRPCI mmap 0x4 */ apb_base[0x104] = 0x40000000; /* 0xA0000000; Point PAGE1 to RAM */ |