summaryrefslogtreecommitdiffstats
path: root/c
diff options
context:
space:
mode:
authorChris Johns <chrisj@rtems.org>2016-08-09 17:05:27 +1000
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2016-10-02 10:40:34 +0200
commit197d0343a2c735ed894245c88199af27ee714afa (patch)
tree0a02ef8ad5b9d562024117ae96c09ce3132fb071 /c
parentbsps/arm: Fix basic cache support for SMP (diff)
downloadrtems-197d0343a2c735ed894245c88199af27ee714afa.tar.bz2
libbsp/arm: Add the TTB table to the default MMU set up as read/write.
This lets the table be changed at runtime for dynamic loading and debugger support. Closes #2775.
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
index c70ebf9570..a821a6c94d 100644
--- a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
+++ b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
@@ -84,6 +84,10 @@ typedef struct {
.begin = (uint32_t) bsp_section_nocache_begin, \
.end = (uint32_t) bsp_section_nocache_end, \
.flags = ARMV7_MMU_DEVICE \
+ }, { \
+ .begin = (uint32_t) bsp_translation_table_base, \
+ .end = (uint32_t) bsp_translation_table_end, \
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
}
BSP_START_DATA_SECTION extern const arm_cp15_start_section_config