diff options
| author | Pavel Pisa <ppisa@pikron.com> | 2013-07-25 10:34:50 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-08-19 10:54:02 +0200 |
| commit | 4eeddefb220bd89ef862ac75e0239795637cca77 (patch) | |
| tree | 104f54b77b7700726e9f1b9152bed644daf487bb /c | |
| parent | Add c++ guard to header. (diff) | |
| download | rtems-4eeddefb220bd89ef862ac75e0239795637cca77.tar.bz2 | |
bsp/csb336: mc9328mxl correct AITC access in bsp_interrupt_dispatch.
The original version is missing void and result is that (*x >> 16) is
optimized to ldh rX,[rY]. But it is not allowed/supported to access
bus/address range used by AITC by other than 32 bit wide accesses
and 16-bit access results in the data abort exception.
The corrected version works on real hardware and is even
more readable.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c index d0d492782d..de7ccd860e 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c +++ b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c @@ -21,7 +21,8 @@ void bsp_interrupt_dispatch(void) { - rtems_vector_number vector = *((uint32_t *) 0x00223040) >> 16; + + rtems_vector_number vector = MC9328MXL_AITC_NIVECSR >> 16; bsp_interrupt_handler_dispatch(vector); } |