2003-02-20 Till Straumann <strauman@slac.stanford.edu>

	PR 349/bsps
	* startup/pgtbl_setup.c, startup/pgtbl_activate.c: New files
	* startup/Makefile.am, startup/bspstart.c, startup/linkcmds:
	Let the powerpc/shared (+derived) BSPs use pagetable support
   	from libcpu.

3 files changed, 135 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/powerpc/shared/ChangeLog b/c/src/lib/libbsp/powerpc/shared/ChangeLog
index a141cacfe8..f53ee7820c 100644
--- a/c/src/lib/libbsp/powerpc/shared/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/shared/ChangeLog
@@ -1,6 +1,14 @@
 2003-02-20	Till Straumann <strauman@slac.stanford.edu>
 
 	PR 349/bsps
+	* startup/pgtbl_setup.c, startup/pgtbl_activate.c: New files
+	* startup/Makefile.am, startup/bspstart.c, startup/linkcmds:
+	Let the powerpc/shared (+derived) BSPs use pagetable support
+   	from libcpu.
+
+2003-02-20	Till Straumann <strauman@slac.stanford.edu>
+
+	PR 349/bsps
 	* vme/.cvsignore, vme/Makefile.am, vme/VME.h, vme/VMEConfig.h,
 	vme/vmeconfig.c: Add glue to the powerpc/shared BSP to use
 	the vmeUniverse VME-PCI bridge driver.
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_activate.c b/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_activate.c
new file mode 100644
index 0000000000..32059b927f
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_activate.c
@@ -0,0 +1,34 @@
+/* $Id$ */
+
+#include <rtems.h>
+#include <libcpu/pte121.h>
+#include <libcpu/bat.h>
+
+/* Default activation of the page tables. This is a weak
+ * alias, so applications may easily override this
+ * default activation procedure.
+ */
+
+/* Author: Till Straumann, <strauman@slac.stanford.edu>, 4/2002 */
+
+void
+BSP_pgtbl_activate(Triv121PgTbl) __attribute__ (( weak, alias("__BSP_default_pgtbl_activate") ));
+
+void
+__BSP_default_pgtbl_activate(Triv121PgTbl pt)
+{
+	if (!pt) return;
+
+	/* switch the text/ro sements to RO only after
+	 * initializing the interrupts because the irq_mng
+	 * installs some code...
+	 *
+	 * activate the page table; it is still masked by the
+	 * DBAT0, however
+	 */
+	triv121PgTblActivate(pt);
+
+	/* finally, switch off DBAT0 */
+	setdbat(0,0,0,0,0);
+	/* At this point, DBAT0 is available for other use... */
+}
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c b/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c
new file mode 100644
index 0000000000..b36ac47d78
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c
@@ -0,0 +1,93 @@
+/* $Id$ */
+
+#include <rtems.h>
+#include <libcpu/mmu.h>
+#include <libcpu/page.h>
+#include <rtems/bspIo.h>
+#include <libcpu/pte121.h>
+
+
+/* Default setup of the page tables. This is a weak
+ * alias, so applications may easily override this
+ * default setup.
+ *
+ * NOTE: while it is possible to change the individual
+ *       mappings, the page table itself MUST be
+ *       allocated at the top of the physical memory!
+ *       bspstart.c RELIES on this.
+ *       Also, the 'setup' routine must reduce
+ *       *pmemsize by the size of the page table.
+ */
+
+/* Author: Till Straumann, <strauman@slac.stanford.edu>, 4/2002 */
+
+Triv121PgTbl
+BSP_pgtbl_setup(unsigned long) __attribute__ (( weak, alias("__BSP_default_pgtbl_setup") ));
+
+
+Triv121PgTbl
+__BSP_default_pgtbl_setup(unsigned int *pmemsize)
+{
+Triv121PgTbl	pt;
+unsigned		ldPtSize,tmp;
+
+  /* Allocate a page table large enough to map
+   * the entire physical memory. We put the page
+   * table at the top of the physical memory.
+   */
+
+  /* get minimal size (log base 2) of PT for
+   * this board's memory
+   */
+  ldPtSize = triv121PgTblLdMinSize(*pmemsize);
+  ldPtSize++; /* double this amount -- then why? */
+
+  /* allocate the page table at the top of the physical
+   * memory - THIS IS NOT AN OPTION - bspstart.c RELIES
+   * ON THIS LAYOUT! (the size, however may be changed)
+   */
+  if ( (pt = triv121PgTblInit(*pmemsize - (1<<ldPtSize), ldPtSize)) ) {
+	/* get those from the linker script.
+	 * NOTE THAT THE CORRECTNESS OF THE LINKER SCRIPT IS CRUCIAL
+	 */
+	extern unsigned long __DATA_START__, _etext;
+
+	/* map text and RO data read-only */
+	tmp = triv121PgTblMap(
+						pt,
+						TRIV121_121_VSID,
+						0,
+						(PAGE_ALIGN((unsigned long)&_etext) - 0) >> PG_SHIFT,
+						0, /* WIMG */
+						TRIV121_PP_RO_PAGE);
+	if (TRIV121_MAP_SUCCESS != tmp) {
+		printk("Unable to map page index %i; reverting to BAT0\n", 
+				tmp);
+		pt = 0;
+	} else {
+		/* map the rest (without the page table itself) RW */
+		tmp = triv121PgTblMap(
+						pt,
+						TRIV121_121_VSID,
+						(unsigned long)&__DATA_START__,
+						(*pmemsize - (1<<ldPtSize) -  (unsigned long)&__DATA_START__ )>> PG_SHIFT,
+						0, /* WIMG */
+						TRIV121_PP_RW_PAGE);
+		if (TRIV121_MAP_SUCCESS != tmp) {
+			printk("Unable to map page index %i; reverting to BAT0\n", 
+					tmp);
+			pt = 0;
+		}
+	}
+  } else {
+	printk("WARNING: unable to allocate page table, keeping DBAT0\n");
+  }
+  if (pt) {
+#ifdef SHOW_MORE_INIT_SETTINGS
+	printk("Setting up page table mappings; protecting text/read-only data from write access\n");
+#endif
+	/* SUCCESS; reduce available memory by size of the page table */
+	*pmemsize -= (1<<ldPtSize);
+  }
+  return pt;
+}