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authorSebastian Huber <sebastian.huber@embedded-brains.de>2019-10-23 14:16:47 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2019-10-23 14:19:47 +0200
commitd2efc968e2f644512062de1e06fab20abd2e6854 (patch)
tree69bbb03479ef3457b91906df86b37c6e0c0ac69f /c/src
parent8c66f1aa061c67301fdb0571384ef0033bc39af7 (diff)
downloadrtems-d2efc968e2f644512062de1e06fab20abd2e6854.tar.bz2
bsp/xilinx-zynq: Simplify linkcmds config
Use NULL-pointer protection also for Qemu variant. Do all calculations in the linker command file. This is a preparation for the new build system.
Diffstat (limited to 'c/src')
-rw-r--r--c/src/lib/libbsp/arm/xilinx-zynq/configure.ac29
1 files changed, 3 insertions, 26 deletions
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
index 8876055b48..6599b34292 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
@@ -73,35 +73,15 @@ RTEMS_BSPOPTS_HELP([BSP_ZYNQ_RAM_LENGTH],[override a BSP's default RAM length])
RTEMS_BSPOPTS_SET([BSP_ZYNQ_NOCACHE_LENGTH],[*],[1M])
RTEMS_BSPOPTS_HELP([BSP_ZYNQ_NOCACHE_LENGTH],[length of nocache RAM region])
+ZYNQ_RAM_ORIGIN="0x00100000"
ZYNQ_RAM_MMU_LENGTH="16k"
ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
ZYNQ_RAM_INT_1_LENGTH="64k - 512"
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu],
- [ZYNQ_RAM_ORIGIN="0x00000000"
- ZYNQ_RAM_MMU="0x0fffc000"
- ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN}"
- ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 16k"])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc702],
- [ZYNQ_RAM_ORIGIN="0x00100000"
- ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
- ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
- ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"])
-
AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc706],
- [ZYNQ_RAM_ORIGIN="0x00400000"
- ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
- ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
- ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 4M - 16k"])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zedboard],
- [ZYNQ_RAM_ORIGIN="0x00100000"
- ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
- ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
- ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"])
+ [ZYNQ_RAM_ORIGIN="0x00400000"])
AC_DEFUN([ZYNQ_LINKCMD],[
AC_ARG_VAR([$1],[$2; default $3])dnl
@@ -109,11 +89,8 @@ AC_ARG_VAR([$1],[$2; default $3])dnl
])
ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN],[normal RAM region origin],[${ZYNQ_RAM_ORIGIN}])
-ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQ_RAM_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_MMU],[MMU region origin],[${ZYNQ_RAM_MMU}])
+ZYNQ_LINKCMD([BSP_ZYNQ_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQ_RAM_LENGTH}])
ZYNQ_LINKCMD([ZYNQ_RAM_MMU_LENGTH],[MMU region length],[${ZYNQ_RAM_MMU_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN_AVAILABLE],[origin of available RAM],[${ZYNQ_RAM_ORIGIN_AVAILABLE}])
-ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH_AVAILABLE],[length of available RAM],[${ZYNQ_RAM_LENGTH_AVAILABLE}])
ZYNQ_LINKCMD([ZYNQ_RAM_NOCACHE_LENGTH],[length of nocache RAM region],[${BSP_ZYNQ_NOCACHE_LENGTH}])
ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_ORIGIN],[internal 0 RAM region origin],[${ZYNQ_RAM_INT_0_ORIGIN}])
ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_LENGTH],[internal 0 RAM region length],[${ZYNQ_RAM_INT_0_LENGTH}])