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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-10-16 16:22:26 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-10-16 16:22:26 +0000 |
| commit | af46ad9bde89ffd1b2730769f7618de73c1d8e4f (patch) | |
| tree | 3906d69adbafed053a285e2ca8c562c185b9f285 /c/src | |
| parent | 2009-10-16 Jennifer Averett <jennifer.averett@OARcorp.com> (diff) | |
| download | rtems-af46ad9bde89ffd1b2730769f7618de73c1d8e4f.tar.bz2 | |
2009-10-16 Jennifer Averett <jennifer@OARcorp.com>
* configure.ac: Default to having PSC8 mezzanine so code builds
all the time.
* startup/bspstart.c: Calibrated clock using an VMEBus controlled
discrete pulsed at a 20ms rate.
Diffstat (limited to 'c/src')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/ChangeLog | 10 | ||||
| -rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/configure.ac | 2 | ||||
| -rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c | 4 |
3 files changed, 13 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/ChangeLog b/c/src/lib/libbsp/powerpc/score603e/ChangeLog index cc8c5f26b0..e80f423de2 100644 --- a/c/src/lib/libbsp/powerpc/score603e/ChangeLog +++ b/c/src/lib/libbsp/powerpc/score603e/ChangeLog @@ -1,3 +1,10 @@ +2009-10-16 Jennifer Averett <jennifer@OARcorp.com> + + * configure.ac: Default to having PSC8 mezzanine so code builds + all the time. + * startup/bspstart.c: Calibrated clock using an VMEBus controlled + discrete pulsed at a 20ms rate. + 2009-05-05 Jennifer Averett <jennifer.averett@OARcorp.com> * Makefile.am, README, configure.ac, preinstall.am, PCI_bus/PCI.c, @@ -9,7 +16,8 @@ startup/bspstart.c, timer/timer.c, tod/tod.c: Updated and tested with the latest powerpc isr source * irq/no_pic.c: New file. - * irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: Removed. + * irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: + Removed. 2008-12-08 Ralf Corsépius <ralf.corsepius@rtems.org> diff --git a/c/src/lib/libbsp/powerpc/score603e/configure.ac b/c/src/lib/libbsp/powerpc/score603e/configure.ac index d01c6a38d4..8057fda0d3 100644 --- a/c/src/lib/libbsp/powerpc/score603e/configure.ac +++ b/c/src/lib/libbsp/powerpc/score603e/configure.ac @@ -37,7 +37,7 @@ RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0]) RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS], [whether using console interrupts]) -RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[0]) +RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[1]) RTEMS_BSPOPTS_HELP([HAS_PMC_PSC8], [whether has a PSC8 PMC board attached to PMC slot]) diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c index 5a08b5e942..bae79b4009 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @@ -42,8 +42,10 @@ unsigned int BSP_processor_frequency; /* * Time base divisior (how many tick for 1 second). + * Note: Calibrated with an application using a 20ms timer and + * a scope. */ -unsigned int BSP_time_base_divisor = 4000; +unsigned int BSP_time_base_divisor = 3960; /* * system init stack |