summaryrefslogtreecommitdiffstats
path: root/c/src/wrapup/Makefile.in
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-07-23 22:02:34 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-07-23 22:02:34 +0000
commit67a2288991ce3662a588ee83c0bea9c9efae5f1e (patch)
treea8d68b22bfd313619f2a0d0b2e3b4755b8278b9d /c/src/wrapup/Makefile.in
parent73452854c06c49caad04b92064e0c1fb40cca02a (diff)
downloadrtems-67a2288991ce3662a588ee83c0bea9c9efae5f1e.tar.bz2
Patch from Eric VALETTE <valette@crf.canon.fr>:
Here is a enhanced version of my previous patch. This patch enables to potentially share the new interrupt management code for all Intel targets (pc386, go32 and force386) bsp. Note : this patch is complete only for pc386. It still needs to be completed for go32 and force386. I carrefully checked that anything needed is in for force386 (only some function name changes for IDT manipulation and GDT segment manipulation). But anyway I will not be able to test any of theses targets...
Diffstat (limited to '')
-rw-r--r--c/src/wrapup/Makefile.in1
1 files changed, 1 insertions, 0 deletions
diff --git a/c/src/wrapup/Makefile.in b/c/src/wrapup/Makefile.in
index bef0aa637b..04a12300d5 100644
--- a/c/src/wrapup/Makefile.in
+++ b/c/src/wrapup/Makefile.in
@@ -16,6 +16,7 @@ include $(RTEMS_ROOT)/make/lib.cfg
LIB=$(PROJECT_RELEASE)/lib/librtemsall${LIB_VARIANT}.a
SRCS=$(wildcard $(PROJECT_RELEASE)/lib/libbsp$(LIB_VARIANT).a) \
+ $(PROJECT_RELEASE)/lib/libcpu$(LIB_VARIANT).a \
$(PROJECT_RELEASE)/lib/librtems$(LIB_VARIANT).a \
$(wildcard $(PROJECT_RELEASE)/lib/libposix$(LIB_VARIANT).a) \
$(wildcard $(PROJECT_RELEASE)/lib/libka9q$(LIB_VARIANT).a) \