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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-26 19:28:11 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-26 19:28:11 +0000
commitca7858bb8856f1afcc537f39763b7c951e5068d3 (patch)
tree3f01b3bb41ce9b2d7bc16c300391382918758caf /c/src/wrapup/Makefile.am
parentPort of RTEMS to the Texas Instruments C3x/C4x DSP families including (diff)
downloadrtems-ca7858bb8856f1afcc537f39763b7c951e5068d3.tar.bz2
Port of RTEMS to the Texas Instruments C3x/C4x DSP families including
a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
Diffstat (limited to 'c/src/wrapup/Makefile.am')
-rw-r--r--c/src/wrapup/Makefile.am4
1 files changed, 2 insertions, 2 deletions
diff --git a/c/src/wrapup/Makefile.am b/c/src/wrapup/Makefile.am
index 4c6d14a014..c42e086c2e 100644
--- a/c/src/wrapup/Makefile.am
+++ b/c/src/wrapup/Makefile.am
@@ -13,8 +13,8 @@ LIB = $(PROJECT_RELEASE)/lib/librtemsall${LIB_VARIANT}.a
if HAS_NETWORKING
LIBNETWORKING = $(PROJECT_RELEASE)/lib/libnetworking$(LIB_VARIANT).a \
- $(PROJECT_RELEASE)/lib/librpc$(LIB_VARIANT).a \
- $(PROJECT_RELEASE)/lib/libxdr$(LIB_VARIANT).a
+ $(wildcard $(PROJECT_RELEASE)/lib/librpc$(LIB_VARIANT).a) \
+ $(wildcard $(PROJECT_RELEASE)/lib/libxdr$(LIB_VARIANT).a)
endif
if HAS_RDBG