diff options
| author | Eric Norum <WENorum@lbl.gov> | 2009-07-28 19:21:24 +0000 |
|---|---|---|
| committer | Eric Norum <WENorum@lbl.gov> | 2009-07-28 19:21:24 +0000 |
| commit | c7cf1d77ca5b36d0b0aec2d0fb896763b0049614 (patch) | |
| tree | 9497d9c7b3e4a986b210f878b84c64d6465ef263 /c/src/lib | |
| parent | 2009-07-28 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
| download | rtems-c7cf1d77ca5b36d0b0aec2d0fb896763b0049614.tar.bz2 | |
PR 1420/bsps
Turn on buffered writes to DRAM. As Device Errata SECF124 notes this may cause
double writes, but that's not really a big problem and benchmarking tests have
shown that buffered writes do gain some performance.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/ChangeLog | 8 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c | 9 |
2 files changed, 15 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/m68k/uC5282/ChangeLog b/c/src/lib/libbsp/m68k/uC5282/ChangeLog index 7d1c140c1c..4647d0a673 100644 --- a/c/src/lib/libbsp/m68k/uC5282/ChangeLog +++ b/c/src/lib/libbsp/m68k/uC5282/ChangeLog @@ -1,3 +1,11 @@ +2009-07-28 Eric Norum <norume@aps.anl.gov> + + PR 1420/bsps + * startup/bspstart.c: Turn on buffered writes to DRAM. As Device Errata + SECF124 notes this may cause double writes, but that's not really a big + problem and benchmarking tests have shown that buffered writes do gain + some performance. + 2009-07-16 Joel Sherrill <joel.sherrill@oarcorp.com> * configure.ac: Rename BSP_BOOTCARD_OPTIONS to diff --git a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c index a5ae443d1d..d2409432db 100644 --- a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c @@ -252,11 +252,16 @@ void bsp_start( void ) /* * Cache SDRAM + * Enable buffered writes + * As Device Errata SECF124 notes this may cause double writes, + * but that's not really a big problem and benchmarking tests have + * shown that buffered writes do gain some performance. */ mcf5282_acr0_mode = MCF5XXX_ACR_AB((uint32_t)RamBase) | MCF5XXX_ACR_AM((uint32_t)RamSize-1) | - MCF5XXX_ACR_EN | - MCF5XXX_ACR_SM_IGNORE; + MCF5XXX_ACR_EN | + MCF5XXX_ACR_SM_IGNORE | + MCF5XXX_ACR_BWE; m68k_set_acr0(mcf5282_acr0_mode); /* |