diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-03-01 16:29:15 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-03-01 16:29:15 +0000 |
commit | 7f794ac78961909a67a30ffff75c6d151bbe9a30 (patch) | |
tree | 71c29f816eed456c31453ba65552d62a7113d8f3 /c/src/lib | |
parent | 2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov> (diff) | |
download | rtems-7f794ac78961909a67a30ffff75c6d151bbe9a30.tar.bz2 |
2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov>
* mongoosev/include/mongoose-v.h: Added cache constants.
* mongoosev/vectorisrs/vectorisrs.c: More tinkering to improve
performance.
Diffstat (limited to 'c/src/lib')
-rw-r--r-- | c/src/lib/libcpu/mips/ChangeLog | 6 | ||||
-rw-r--r-- | c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c | 6 |
2 files changed, 9 insertions, 3 deletions
diff --git a/c/src/lib/libcpu/mips/ChangeLog b/c/src/lib/libcpu/mips/ChangeLog index 6fa8fe6bb5..84477e631c 100644 --- a/c/src/lib/libcpu/mips/ChangeLog +++ b/c/src/lib/libcpu/mips/ChangeLog @@ -1,3 +1,9 @@ +2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov> + + * mongoosev/include/mongoose-v.h: Added cache constants. + * mongoosev/vectorisrs/vectorisrs.c: More tinkering to improve + performance. + 2002-02-08 Joel Sherrill <joel@OARcorp.com> * mongoosev/vectorisrs/vectorisrs.c: Fixed to use new frame format. diff --git a/c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c index dc8e754a55..47a5d0332d 100644 --- a/c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c +++ b/c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c @@ -31,7 +31,7 @@ int mips_default_isr( int vector ) mips_get_sr( sr ); mips_get_cause( cause ); - sr2 = sr & ~0xff; + sr2 = sr & ~0xffff; mips_set_sr(sr2); printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n", vector, cause, sr ); @@ -75,7 +75,7 @@ int assertSoftwareInterrupt( unsigned32 n ) // via this #if will remove the code entirely from the RTEMS kernel. // -#if 1 +#if 0 #define SET_ISR_FLAG( offset ) *((unsigned32 *)(0x8001e000+offset)) = 1; #define CLR_ISR_FLAG( offset ) *((unsigned32 *)(0x8001e000+offset)) = 0; #else @@ -244,7 +244,7 @@ void mips_vector_isr_handlers( CPU_Interrupt_frame *frame ) // if another interrupt has arrived, jump out right // away but be sure to reset all the interrupts we've // already serviced - //if( READ_CAUSE() & 0xff ) goto pfexit; + if( READ_CAUSE() & 0xff ) goto pfexit; } } } |