Update for exception support changes.

author: Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2009-10-23 07:32:46 +0000
committer: Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2009-10-23 07:32:46 +0000
commit: 2d2de4eba16374ea05fc7ee9cd257ad0d4ebf2ca (patch)
tree: 45161e8d9a9d0a9c483b84d915085c0230b09ea0 /c/src/lib
parent: 2009-10-23 Ralf Corsépius <ralf.corsepius@rtems.org> (diff)
download: rtems-2d2de4eba16374ea05fc7ee9cd257ad0d4ebf2ca.tar.bz2
103 files changed, 1601 insertions, 1580 deletions
diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog
index f727810a41..a79d0abdc8 100644
--- a/c/src/lib/libbsp/powerpc/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/ChangeLog
@@ -1,3 +1,9 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* shared/clock/clock.c, shared/irq/irq_init.c,
+	shared/irq/openpic_i8259_irq.c: Changed exception header file
+	includes.
+
 2009-10-20	Till Straumann <strauman@slac.stanford.edu>
 
 	* shared/startup/pgtbl_setup.c: Fixed compiler warnings
diff --git a/c/src/lib/libbsp/powerpc/ep1a/ChangeLog b/c/src/lib/libbsp/powerpc/ep1a/ChangeLog
index 79fa0f43c0..77c7191bee 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/ep1a/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq_init.c, irq/openpic_xxx_irq.c: Changed exception header file
+	includes.
+	* startup/bspstart.c: Update for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/ep1a.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/ep1a/Makefile.am b/c/src/lib/libbsp/powerpc/ep1a/Makefile.am
index b93be714b1..5297a010b6 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/ep1a/Makefile.am
@@ -65,8 +65,6 @@ libbsp_a_SOURCES += pci/no_host_bridge.c ../../powerpc/shared/pci/pci.c \
     ../../powerpc/shared/pci/pcifinddevice.c
 
 include_bsp_HEADERS += ../../powerpc/shared/irq/irq.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
 	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
 # irq
 libbsp_a_SOURCES += irq/irq_init.c irq/openpic_xxx_irq.c ../../powerpc/shared/irq/i8259.c 
@@ -87,11 +85,11 @@ libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c \
     ../../shared/vmeUniverse/vme_am_defs.h
 
 libbsp_a_LIBADD = \
+    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
index 7a6ed9348f..cfa39338c7 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
@@ -27,7 +27,7 @@
 #include <bsp/openpic.h>
 #include <bsp/irq.h>
 #include <bsp.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 #include <bsp/motorola.h>
 #include <rtems/bspIo.h>
 
diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c b/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
index 63226173fc..afdf8a1064 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
@@ -18,7 +18,6 @@
 #include <bsp/irq_supp.h>
 #include <bsp/VMEConfig.h>
 #include <bsp/openpic.h>
-#include <libcpu/raw_exception.h>
 #include <libcpu/io.h>
 #include <bsp/vectors.h>
 #include <stdlib.h>
diff --git a/c/src/lib/libbsp/powerpc/ep1a/preinstall.am b/c/src/lib/libbsp/powerpc/ep1a/preinstall.am
index 8e9bef4375..247c63a3a1 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/ep1a/preinstall.am
@@ -105,14 +105,6 @@ $(PROJECT_INCLUDE)/bsp/irq.h: ../../powerpc/shared/irq/irq.h $(PROJECT_INCLUDE)/
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
 
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
 $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
diff --git a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
index 3c28bba449..dbf6e5a989 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
@@ -277,8 +277,9 @@ void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
 
 void bsp_start( void )
 {
-  uint32_t intrStackStart;
-  uint32_t intrStackSize;
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+  uintptr_t intrStackStart;
+  uintptr_t intrStackSize;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
   Triv121PgTbl	pt=0;   /*  R = e; */
@@ -315,17 +316,20 @@ ShowBATS();
   /*
    * Initialize the interrupt related settings.
    */
-  intrStackStart = (uint32_t) __rtems_end;
+  intrStackStart = (uintptr_t) __rtems_end;
   intrStackSize = rtems_configuration_get_interrupt_stack_size();
 
   /*
    * Initialize default raw exception hanlders.
    */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     intrStackStart,
     intrStackSize
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /*
    * Init MMU block address translation to enable hardware
diff --git a/c/src/lib/libbsp/powerpc/gen5200/ChangeLog b/c/src/lib/libbsp/powerpc/gen5200/ChangeLog
index 0cac867cfa..6b3a31a065 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/gen5200/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq.c: Changed exception header file includes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-22	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* clock/clock.c: Add missing prototypes.
diff --git a/c/src/lib/libbsp/powerpc/gen5200/Makefile.am b/c/src/lib/libbsp/powerpc/gen5200/Makefile.am
index 6619c9d9da..8f8b8d35e9 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/gen5200/Makefile.am
@@ -68,9 +68,7 @@ libbsp_a_SOURCES += i2c/i2c.c i2c/i2cdrv.c i2c/mpc5200mbus.c i2c/mpc5200mbus.h
 # ide
 libbsp_a_SOURCES += ide/idecfg.c ide/pcmcia_ide.c ide/pcmcia_ide.h
 
-include_bsp_HEADERS = ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/vectors.h \
-	../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/ppc_exc_bspsupp.h \
-	../../shared/include/irq-generic.h \
+include_bsp_HEADERS = ../../shared/include/irq-generic.h \
 	include/irq-config.h \
 	include/irq.h \
 	include/i2cdrv.h \
@@ -134,7 +132,6 @@ libbsp_a_LIBADD =  ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
 	../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
 	../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
 	../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
 	../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
 	../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
 	../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
diff --git a/c/src/lib/libbsp/powerpc/gen5200/irq/irq.c b/c/src/lib/libbsp/powerpc/gen5200/irq/irq.c
index 8cdca897ea..181ebc42f2 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/gen5200/irq/irq.c
@@ -76,12 +76,10 @@
 #include <rtems.h>
 
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 
 #include <bsp.h>
 #include <bsp/irq.h>
-#include <bsp/vectors.h>
-#include <bsp/ppc_exc_bspsupp.h>
 #include <bsp/irq-generic.h>
 #include <bsp/mpc5200.h>
 
diff --git a/c/src/lib/libbsp/powerpc/gen5200/preinstall.am b/c/src/lib/libbsp/powerpc/gen5200/preinstall.am
index f73fdcda9d..af0cb3e3db 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/gen5200/preinstall.am
@@ -101,14 +101,6 @@ $(PROJECT_LIB)/linkcmds.pm520: startup/linkcmds.pm520 $(PROJECT_LIB)/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.pm520
 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.pm520
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
 $(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
index 3614da6132..ce621c881c 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
@@ -94,17 +94,15 @@
 /*                                                                     */
 /***********************************************************************/
 
-#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
-
 #include <rtems.h>
+
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
 
 #include <bsp.h>
+#include <bsp/vectors.h>
 #include <bsp/bootcard.h>
-#include <bsp/ppc_exc_bspsupp.h>
-
 #include <bsp/irq.h>
+#include <bsp/irq-generic.h>
 
 #if defined(HAS_UBOOT)
 /* will be overwritten from startup code */
@@ -132,6 +130,7 @@ void _BSP_Fatal_error(unsigned int v)
 
 void bsp_start(void)
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
 
@@ -170,15 +169,19 @@ void bsp_start(void)
 
   /* Initialize exception handler */
   ppc_exc_cache_wb_check = 0;
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
-    (uint32_t) bsp_interrupt_stack_start,
-    (uint32_t) bsp_interrupt_stack_size
+    (uintptr_t) bsp_interrupt_stack_start,
+    (uintptr_t) bsp_interrupt_stack_size
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /* Initalize interrupt support */
-  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
-    BSP_panic( "Cannot intitialize interrupt support\n");
+  sc = bsp_interrupt_initialize();
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot intitialize interrupts");
   }
 
   /*
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
index 9a9e12d92d..dee3957d61 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq.c, irq/irq_init.c: Changed exception header file includes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/gen83xx.inc: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am
index c307d70604..f06dbca7a6 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am
@@ -66,16 +66,18 @@ libbsp_a_SOURCES += ../shared/clock/clock.c
 include_bsp_HEADERS = include/irq.h \
 	include/irq-config.h \
 	../../shared/include/irq-generic.h \
+	../../shared/include/irq-info.h \
 	include/hwreg_vals.h \
 	../shared/include/u-boot.h \
 	../shared/include/tictac.h
 
 # irq
-libbsp_a_SOURCES += include/irq.h \
-	include/irq-config.h \
-	irq/irq.c \
+libbsp_a_SOURCES += irq/irq.c \
 	../../shared/src/irq-generic.c \
-	../../shared/src/irq-legacy.c
+	../../shared/src/irq-legacy.c \
+	../../shared/src/irq-info.c \
+	../../shared/src/irq-shell.c \
+	../../shared/src/irq-server.c
 
 # console
 libbsp_a_SOURCES += console/console.c console/ns16550cfg.c 
@@ -95,7 +97,6 @@ endif
 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
 	../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
 	../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
 	../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
 	../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel   \
 	../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h b/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
index de0a7dba4d..ec63e160fa 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
@@ -24,9 +24,7 @@
 #define TMTESTS_TM27_H
 
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
-
-#include <bsp/ppc_exc_bspsupp.h>
+#include <bsp/vectors.h>
 
 #define MUST_WAIT_FOR_INTERRUPT 1
 
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
index e7d84c88cd..e9a14c9d35 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
@@ -22,12 +22,10 @@
 #include <rtems.h>
 
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 
 #include <bsp.h>
 #include <bsp/irq.h>
-#include <bsp/vectors.h>
-#include <bsp/ppc_exc_bspsupp.h>
 #include <bsp/irq-generic.h>
 
 #define MPC83XX_IPIC_VECTOR_NUMBER 92
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am b/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am
index e87e14ad65..832bf2e798 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am
@@ -101,6 +101,10 @@ $(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJE
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
 
+$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
+
 $(PROJECT_INCLUDE)/bsp/hwreg_vals.h: include/hwreg_vals.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/hwreg_vals.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/hwreg_vals.h
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
index 6cfa7e2853..9e691e5b82 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
@@ -21,12 +21,11 @@
  */
 
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
 
 #include <bsp.h>
+#include <bsp/vectors.h>
 #include <bsp/bootcard.h>
 #include <bsp/irq-generic.h>
-#include <bsp/ppc_exc_bspsupp.h>
 
 #ifdef HAS_UBOOT
 
@@ -84,13 +83,12 @@ void _BSP_Fatal_error(unsigned n)
 void bsp_start( void)
 {
   rtems_status_code sc = RTEMS_SUCCESSFUL;
-  int rv = 0;
 
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
 
-  uint32_t interrupt_stack_start = (uint32_t) bsp_interrupt_stack_start;
-  uint32_t interrupt_stack_size = (uint32_t) bsp_interrupt_stack_size;
+  uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start;
+  uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_size;
 
   /*
    * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -130,22 +128,25 @@ void bsp_start( void)
 #endif /* HAS_UBOOT */
 
   /* Initialize exception handler */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     interrupt_stack_start,
     interrupt_stack_size
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /* Install default handler for the decrementer exception */
-  rv = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
-  if (rv < 0) {
-    BSP_panic( "Cannot install decrementer exception handler!\n");
+  sc = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot install decrementer exception handler");
   }
 
   /* Initalize interrupt support */
   sc = bsp_interrupt_initialize();
   if (sc != RTEMS_SUCCESSFUL) {
-    BSP_panic( "Cannot intitialize interrupt support\n");
+    BSP_panic("cannot intitialize interrupts\n");
   }
 
 #ifdef SHOW_MORE_INIT_SETTINGS
diff --git a/c/src/lib/libbsp/powerpc/haleakala/ChangeLog b/c/src/lib/libbsp/powerpc/haleakala/ChangeLog
index f75e2c6dc6..167ead9692 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/haleakala/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq.c, include/tm27.h: Changed exception header file includes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/haleakala.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/haleakala/Makefile.am b/c/src/lib/libbsp/powerpc/haleakala/Makefile.am
index aaf80cb3db..73cee28cb8 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/haleakala/Makefile.am
@@ -46,17 +46,15 @@ libbsp_a_SOURCES += ../../powerpc/shared/console/uart.c \
     ../../powerpc/shared/console/console.c
 
 include_bsp_HEADERS += irq/irq.h \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
+    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
 
 # irq
 libbsp_a_SOURCES += irq/irq_init.c irq/irq.c
 
 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
+    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/ppc403/clock.rel \
     ../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel 
diff --git a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c
index 7fd7f79420..736fde0e52 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c
@@ -14,7 +14,7 @@
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <bsp/irq_supp.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 #include <libcpu/powerpc-utility.h>
 
 
@@ -166,7 +166,7 @@ BSP_setup_the_pic(rtems_irq_global_settings* config)
  */
  
 int 
-C_dispatch_irq_handler( struct _BSP_Exception_frame* frame, unsigned int excNum )
+C_dispatch_irq_handler( BSP_Exception_frame* frame, unsigned int excNum )
 {
 	if (excNum == ASM_EXT_VECTOR) {
 		uint32_t active[kUICWords];
diff --git a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h
index fcb33e0b3e..908fe4bf9b 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h
+++ b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h
@@ -139,7 +139,7 @@ extern "C" {
 	#define BSP_UART_COM1_IRQ		BSP_UIC_UART0 /* Required by shared/console/uart.c */
 	#define BSP_UART_COM2_IRQ		BSP_UIC_UART1
 
-	/* Define processor IRQ numbers; IRQs that are handled by the raw_exception vectors */
+	/* Define processor IRQ numbers; IRQs that are handled by the exception vectors */
 
 	#define BSP_PIT				BSP_PROCESSOR_IRQ_LOWEST_OFFSET	/* Required by ppc403/clock.c */
 	#define	BSP_FIT				BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1
diff --git a/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c b/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c
index 641d6dc685..cafe6f6d7a 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c
@@ -13,7 +13,7 @@
 #include <libcpu/spr.h>
 #include <bsp/irq.h>
 #include <bsp.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 #include <rtems/bspIo.h>
 #include <rtems/powerpc/powerpc.h>
 
diff --git a/c/src/lib/libbsp/powerpc/haleakala/preinstall.am b/c/src/lib/libbsp/powerpc/haleakala/preinstall.am
index b0d9ba020f..fc36cf985c 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/haleakala/preinstall.am
@@ -77,15 +77,7 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
 $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
 
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
diff --git a/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c b/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
index f4737d6a45..cf37168e03 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
@@ -64,10 +64,8 @@
 #include <bsp.h>
 #include <bsp/uart.h>
 #include <bsp/irq.h>
-#include <rtems/bspIo.h>
-#include <libcpu/cpuIdent.h>
-#include <rtems/powerpc/powerpc.h>
-#include <bsp/ppc_exc_bspsupp.h>
+#include <libcpu/powerpc-utility.h>
+#include <bsp/vectors.h>
 #include <ppc4xx/ppc405gp.h>
 #include <ppc4xx/ppc405ex.h>
 
@@ -171,6 +169,7 @@ BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
  */
 void bsp_start( void )
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   LINKER_SYMBOL(intrStack_start);
   LINKER_SYMBOL(intrStack_size);
   ppc_cpu_id_t myCpu;
@@ -205,10 +204,14 @@ void bsp_start( void )
   /*
    * Initialize default raw exception handlers. 
    */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
-    (uint32_t) intrStack_start,
-    (uint32_t) intrStack_size);
+    (uintptr_t) intrStack_start,
+    (uintptr_t) intrStack_size
+  );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /*
    * Install our own set of exception vectors
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
index 99b220dc65..43ed908a1d 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
@@ -1,3 +1,12 @@
+2009-10-23	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* include/irq-config.h: New file.
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	Use generic interrupt support.
+	* make/custom/mbx8xx.inc, startup/linkcmds: Enable EABI.
+	* irq/irq.c, startup/bspstart.c: Converted to generic interrupt
+	support.  Update for exception support changes.
+
 2009-10-23	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* irq/irq.h: Add BSP_irq_enabled_at_cpm.
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/Makefile.am b/c/src/lib/libbsp/powerpc/mbx8xx/Makefile.am
index f2e77e6b22..ed8ac4f748 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/Makefile.am
@@ -21,7 +21,10 @@ noinst_PROGRAMS =
 
 include_HEADERS += include/coverhd.h
 include_bsp_HEADERS = include/mbx.h include/commproc.h include/8xx_immap.h \
-    irq/irq.h vectors/vectors.h
+	irq/irq.h \
+	include/irq-config.h \
+	../../shared/include/irq-generic.h \
+	../../shared/include/irq-info.h
 
 EXTRA_DIST = times-mbx821 times-mbx860
 
@@ -35,12 +38,14 @@ libbsp_a_SOURCES += clock/p_clock.c
 # console
 libbsp_a_SOURCES += console/console.c
 # irq
-libbsp_a_SOURCES += irq/irq.c irq/irq_asm.S irq/irq_init.c
+libbsp_a_SOURCES += irq/irq.c \
+	../../shared/src/irq-generic.c \
+	../../shared/src/irq-legacy.c \
+	../../shared/src/irq-info.c \
+	../../shared/src/irq-shell.c \
+	../../shared/src/irq-server.c
 # ide
 libbsp_a_SOURCES += ide/idecfg.c ide/pcmcia_ide.c
-# vectors
-libbsp_a_SOURCES += vectors/vectors.h vectors/vectors_init.c \
-    vectors/vectors.S
 # startup
 libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
     ../../shared/bsppost.c ../../shared/bsppredriverhook.c \
@@ -61,7 +66,7 @@ libbsp_a_LIBADD = \
     ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
+    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/clock.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/console-generic.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/cpm.rel \
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
index 8d49448199..0e440984b6 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
@@ -2,6 +2,8 @@
  *
  *  This file contains the implementation of the function described in irq.h
  *
+ *  Copyright (c) 2009 embedded brains GmbH.
+ *
  *  Copyright (C) 1998, 1999 valette@crf.canon.fr
  *
  *  The license and distribution terms for this file may be
@@ -14,25 +16,13 @@
 #include <rtems/system.h>
 #include <bsp.h>
 #include <bsp/irq.h>
-#include <rtems/score/thread.h>
-#include <rtems/score/apiext.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/irq-generic.h>
 #include <bsp/vectors.h>
 #include <bsp/8xx_immap.h>
 #include <bsp/mbx.h>
 #include <bsp/commproc.h>
 
-/*
- * default handler connected on each irq after bsp initialization
- */
-static rtems_irq_connect_data	default_rtems_entry;
-
-/*
- * location used to store initial tables used for interrupt
- * management.
- */
-static rtems_irq_global_settings* 	internal_config;
-static rtems_irq_connect_data*		rtems_hdl_tbl;
+volatile unsigned int ppc_cached_irq_mask;
 
 /*
  * Check if symbolic IRQ name is an SIU IRQ
@@ -40,8 +30,8 @@ static rtems_irq_connect_data*		rtems_hdl_tbl;
 static inline int is_siu_irq(const rtems_irq_number irqLine)
 {
   return (((int) irqLine <= BSP_SIU_IRQ_MAX_OFFSET) &
-	  ((int) irqLine >= BSP_SIU_IRQ_LOWEST_OFFSET)
-	 );
+    ((int) irqLine >= BSP_SIU_IRQ_LOWEST_OFFSET)
+   );
 }
 
 /*
@@ -50,18 +40,8 @@ static inline int is_siu_irq(const rtems_irq_number irqLine)
 static inline int is_cpm_irq(const rtems_irq_number irqLine)
 {
   return (((int) irqLine <= BSP_CPM_IRQ_MAX_OFFSET) &
-	  ((int) irqLine >= BSP_CPM_IRQ_LOWEST_OFFSET)
-	 );
-}
-
-/*
- * Check if symbolic IRQ name is a Processor IRQ
- */
-static inline int is_processor_irq(const rtems_irq_number irqLine)
-{
-  return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
-	  ((int) irqLine >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
-	 );
+    ((int) irqLine >= BSP_CPM_IRQ_LOWEST_OFFSET)
+   );
 }
 
 /*
@@ -85,36 +65,6 @@ const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] =
      0xFFF00000, 0xFFF80000, 0xFFFC0000, 0xFFFE0000
 };
 
-/*
- * ------------------------ RTEMS Irq helper functions ----------------
- */
-
-/*
- * Caution : this function assumes the variable "internal_config"
- * is already set and that the tables it contains are still valid
- * and accessible.
- */
-static void compute_SIU_IvectMask_from_prio (void)
-{
-  /*
-   * In theory this is feasible. No time to code it yet. See i386/shared/irq.c
-   * for an example based on 8259 controller mask. The actual masks defined
-   * correspond to the priorities defined for the SIU in irq_init.c.
-   */
-}
-
-/*
- * This function check that the value given for the irq line
- * is valid.
- */
-
-static int isValidInterrupt(int irq)
-{
-  if ( (irq < BSP_LOWEST_OFFSET) || (irq > BSP_MAX_OFFSET) || (irq == BSP_CPM_INTERRUPT) )
-    return 0;
-  return 1;
-}
-
 int BSP_irq_enable_at_cpm(const rtems_irq_number irqLine)
 {
   int cpm_irq_index;
@@ -180,7 +130,7 @@ int BSP_irq_disable_at_siu(const rtems_irq_number irqLine)
   return 0;
 }
 
-int BSP_irq_enabled_at_siu     	(const rtems_irq_number irqLine)
+int BSP_irq_enabled_at_siu       (const rtems_irq_number irqLine)
 {
   int siu_irq_index;
 
@@ -191,210 +141,6 @@ int BSP_irq_enabled_at_siu     	(const rtems_irq_number irqLine)
   return ppc_cached_irq_mask & (1 << (31-siu_irq_index));
 }
 
-/*
- * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
- */
-
-int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
-{
-    rtems_interrupt_level       level;
-
-    if (!isValidInterrupt(irq->name)) {
-      return 0;
-    }
-    /*
-     * Check if default handler is actually connected. If not issue an error.
-     * You must first get the current handler via i386_get_current_idt_entry
-     * and then disconnect it using i386_delete_idt_entry.
-     * RATIONALE : to always have the same transition by forcing the user
-     * to get the previous handler before accepting to disconnect.
-     */
-    if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
-      return 0;
-    }
-
-    rtems_interrupt_disable(level);
-
-    /*
-     * store the data provided by user
-     */
-    rtems_hdl_tbl[irq->name] = *irq;
-
-    if (is_cpm_irq(irq->name)) {
-      /*
-       * Enable interrupt at PIC level
-       */
-      BSP_irq_enable_at_cpm (irq->name);
-    }
-
-    if (is_siu_irq(irq->name)) {
-      /*
-       * Enable interrupt at SIU level
-       */
-      BSP_irq_enable_at_siu (irq->name);
-    }
-
-    if (is_processor_irq(irq->name)) {
-      /*
-       * Should Enable exception at processor level but not needed.  Will restore
-       * EE flags at the end of the routine anyway.
-       */
-    }
-    /*
-     * Enable interrupt on device
-     */
-	if (irq->on)
-    	irq->on(irq);
-
-    rtems_interrupt_enable(level);
-
-    return 1;
-}
-
-int BSP_get_current_rtems_irq_handler	(rtems_irq_connect_data* irq)
-{
-     if (!isValidInterrupt(irq->name)) {
-      return 0;
-     }
-     *irq = rtems_hdl_tbl[irq->name];
-     return 1;
-}
-
-int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
-{
-    rtems_interrupt_level       level;
-
-    if (!isValidInterrupt(irq->name)) {
-      return 0;
-    }
-    /*
-     * Check if default handler is actually connected. If not issue an error.
-     * You must first get the current handler via i386_get_current_idt_entry
-     * and then disconnect it using i386_delete_idt_entry.
-     * RATIONALE : to always have the same transition by forcing the user
-     * to get the previous handler before accepting to disconnect.
-     */
-    if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
-      return 0;
-    }
-    rtems_interrupt_disable(level);
-
-    if (is_cpm_irq(irq->name)) {
-      /*
-       * disable interrupt at PIC level
-       */
-      BSP_irq_disable_at_cpm (irq->name);
-    }
-    if (is_siu_irq(irq->name)) {
-      /*
-       * disable interrupt at OPENPIC level
-       */
-      BSP_irq_disable_at_siu (irq->name);
-    }
-    if (is_processor_irq(irq->name)) {
-      /*
-       * disable exception at processor level
-       */
-    }
-
-    /*
-     * Disable interrupt on device
-     */
-	if (irq->off)
-    	irq->off(irq);
-
-    /*
-     * restore the default irq value
-     */
-    rtems_hdl_tbl[irq->name] = default_rtems_entry;
-
-    rtems_interrupt_enable(level);
-
-    return 1;
-}
-
-/*
- * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
- */
-
-int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
-{
-    int                    i;
-    rtems_interrupt_level  level;
-
-    /*
-     * Store various code accelerators
-     */
-    internal_config 		= config;
-    default_rtems_entry 	= config->defaultEntry;
-    rtems_hdl_tbl 		= config->irqHdlTbl;
-
-    rtems_interrupt_disable(level);
-    /*
-     * start with CPM IRQ
-     */
-    for (i=BSP_CPM_IRQ_LOWEST_OFFSET; i < BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER ; i++) {
-      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-	BSP_irq_enable_at_cpm (i);
-	if (rtems_hdl_tbl[i].on)
-		rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-      }
-      else {
-	if (rtems_hdl_tbl[i].off)
-		rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-	BSP_irq_disable_at_cpm (i);
-      }
-    }
-
-    /*
-     * continue with PCI IRQ
-     */
-    /*
-     * set up internal tables used by rtems interrupt prologue
-     */
-    compute_SIU_IvectMask_from_prio ();
-
-    for (i=BSP_SIU_IRQ_LOWEST_OFFSET; i < BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER ; i++) {
-      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-	BSP_irq_enable_at_siu (i);
-	if (rtems_hdl_tbl[i].on)
-		rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-      }
-      else {
-	if (rtems_hdl_tbl[i].off)
-		rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-	BSP_irq_disable_at_siu (i);
-       }
-    }
-    /*
-     * Must enable CPM interrupt on SIU. CPM on SIU Interrupt level has already been
-     * set up in BSP_CPM_irq_init.
-     */
-    ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
-    BSP_irq_enable_at_siu (BSP_CPM_INTERRUPT);
-    /*
-     * finish with Processor exceptions handled like IRQ
-     */
-    for (i=BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER; i++) {
-      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-	if (rtems_hdl_tbl[i].on)
-		rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-      }
-      else {
-	if (rtems_hdl_tbl[i].off)
-		rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-      }
-    }
-    rtems_interrupt_enable(level);
-    return 1;
-}
-
-int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
-{
-    *config = internal_config;
-    return 0;
-}
-
 #ifdef DISPATCH_HANDLER_STAT
 volatile unsigned int maxLoop = 0;
 #endif
@@ -402,11 +148,11 @@ volatile unsigned int maxLoop = 0;
 /*
  * High level IRQ handler called from shared_raw_irq_code_entry
  */
-int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
+int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
 {
   register unsigned int irq;
   register unsigned cpmIntr;                  /* boolean */
-  register unsigned oldMask;		      /* old siu pic masks */
+  register unsigned oldMask;          /* old siu pic masks */
   register unsigned msr;
   register unsigned new_msr;
 #ifdef DISPATCH_HANDLER_STAT
@@ -420,7 +166,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
     new_msr = msr | MSR_EE;
     _CPU_MSR_SET(new_msr);
 
-    rtems_hdl_tbl[BSP_DECREMENTER].hdl(rtems_hdl_tbl[BSP_DECREMENTER].handle);
+    bsp_interrupt_handler_dispatch(BSP_DECREMENTER);
 
     _CPU_MSR_SET(msr);
     return 0;
@@ -482,7 +228,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
     new_msr = msr | MSR_EE;
     _CPU_MSR_SET(new_msr);
 
-    rtems_hdl_tbl[irq].hdl(rtems_hdl_tbl[irq].handle);
+    bsp_interrupt_handler_dispatch(irq);
 
     _CPU_MSR_SET(msr);
 
@@ -505,21 +251,104 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
   return 0;
 }
 
-void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
+void BSP_SIU_irq_init(void)
 {
   /*
-   * Process pending signals that have not already been
-   * processed by _Thread_Displatch. This happens quite
-   * unfrequently : the ISR must have posted an action
-   * to the current running thread.
+   * In theory we should initialize two registers at least :
+   * SIMASK, SIEL. SIMASK is reset at 0 value meaning no interrupt. But
+   * we should take care that a monitor may have restoreed to another value.
+   * If someone find a reasonnable value for SIEL, AND THE NEED TO CHANGE IT
+   * please feel free to add it here.
    */
-  if ( _Thread_Do_post_task_switch_extension ||
-       _Thread_Executing->do_post_task_switch_extension ) {
-    _Thread_Executing->do_post_task_switch_extension = false;
-    _API_extensions_Run_postswitch();
+  ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 0;
+  ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 0xffff0000;
+  ppc_cached_irq_mask = 0;
+  ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel;
+}
+
+/*
+ * Initialize CPM interrupt management
+ */
+void
+BSP_CPM_irq_init(void)
+{
+  /*
+   * Initialize the CPM interrupt controller.
+   */
+  ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr =
+#ifdef mpc860
+    (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
+#else
+    (CICR_SCB_SCC2 | CICR_SCA_SCC1) |
+#endif
+    ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
+  ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;
+
+  ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
+}
+
+rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
+{
+  if (is_cpm_irq(irqnum)) {
+    /*
+     * Enable interrupt at PIC level
+     */
+    BSP_irq_enable_at_cpm (irqnum);
+  }
+
+  if (is_siu_irq(irqnum)) {
+    /*
+     * Enable interrupt at SIU level
+     */
+    BSP_irq_enable_at_siu (irqnum);
   }
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
+{
+  if (is_cpm_irq(irqnum)) {
+    /*
+     * disable interrupt at PIC level
+     */
+    BSP_irq_disable_at_cpm (irqnum);
+  }
+  if (is_siu_irq(irqnum)) {
+    /*
+     * disable interrupt at OPENPIC level
+     */
+    BSP_irq_disable_at_siu (irqnum);
+  }
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_facility_initialize()
+{
+  /* Install exception handler */
+  if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
+    return RTEMS_IO_ERROR;
+  }
+  if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
+    return RTEMS_IO_ERROR;
+  }
+
+  /* Initialize the interrupt controller */
+  BSP_SIU_irq_init();
+  BSP_CPM_irq_init();
+
   /*
-   * I plan to process other thread related events here.
-   * This will include DEBUG session requested from keyboard...
+   * Must enable CPM interrupt on SIU. CPM on SIU Interrupt level has already been
+   * set up in BSP_CPM_irq_init.
    */
+  ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
+  BSP_irq_enable_at_siu (BSP_CPM_INTERRUPT);
+
+  return RTEMS_SUCCESSFUL;
+}
+
+void bsp_interrupt_handler_default( rtems_vector_number vector)
+{
+  printk( "Spurious interrupt: 0x%08x\n", vector);
 }
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/make/custom/mbx8xx.inc b/c/src/lib/libbsp/powerpc/mbx8xx/make/custom/mbx8xx.inc
index af7295bdaa..c1a22352e6 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/make/custom/mbx8xx.inc
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/make/custom/mbx8xx.inc
@@ -40,7 +40,8 @@ RTEMS_CPU_MODEL=mpc$(8XX_CPU_TYPE)
 #  This contains the compiler options necessary to select the CPU model
 #  and (hopefully) optimize for it.
 #
-CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -Dmpc$(8XX_CPU_TYPE) -D$(RTEMS_MBX_MODEL)
+CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -Dmpc$(8XX_CPU_TYPE) -D$(RTEMS_MBX_MODEL) \
+	-meabi -msdata -fno-common
 
 # optimize flag: typically -O2
 CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/preinstall.am b/c/src/lib/libbsp/powerpc/mbx8xx/preinstall.am
index 8d95e4580c..5267b248ed 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/preinstall.am
@@ -68,9 +68,17 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
+$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
+
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
+
+$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
 
 $(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
index b04323b118..2450f4f83f 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
@@ -18,8 +18,6 @@
  *  $Id$
  */
 
-#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
-
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <rtems/bspIo.h>
@@ -29,8 +27,6 @@
 
 SPR_RW(SPRG1)
 
-extern unsigned long intrStackPtr;
-
 /*
  *  Driver configuration parameters
  */
@@ -45,6 +41,9 @@ uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
 uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
 bool       bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
 
+extern char IntrStack_start [];
+extern char intrStack [];
+
 void BSP_panic(char *s)
 {
   printk("%s PANIC %s\n",_RTEMS_version, s);
@@ -83,9 +82,9 @@ void _BSP_Fatal_error(unsigned int v)
  */
 void bsp_start(void)
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
-  register unsigned char* intrStack;
 
   /*
    * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -112,17 +111,22 @@ void bsp_start(void)
   rtems_cache_enable_data();
 #endif
 #endif
-  /*
-   * Initialize some SPRG registers related to irq handling
-   */
 
-  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
-  _write_SPRG1((unsigned int)intrStack);
-
-  /*
-   * Install our own set of exception vectors
-   */
-  initialize_exceptions();
+  /* Initialize exception handler */
+  sc = ppc_exc_initialize(
+    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
+    (uintptr_t) IntrStack_start,
+    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
+  );
+  if ( sc != RTEMS_SUCCESSFUL ) {
+    BSP_panic( "cannot initialize exceptions" );
+  }
+
+  /* Initalize interrupt support */
+  sc = bsp_interrupt_initialize();
+  if ( sc != RTEMS_SUCCESSFUL ) {
+    BSP_panic( "cannot initialize interrupts" );
+  }
 
   /*
    *  initialize the device driver parameters
@@ -165,10 +169,7 @@ void bsp_start(void)
   m8xx.scc2p.rbase=0;
   m8xx.scc2p.tbase=0;
   m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
-  /*
-   * Initalize RTEMS IRQ system
-   */
-  BSP_rtems_irq_mng_init(0);
+
 #ifdef SHOW_MORE_INIT_SETTINGS
   printk("Exit from bspstart\n");
 #endif
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/linkcmds b/c/src/lib/libbsp/powerpc/mbx8xx/startup/linkcmds
index a090366a4d..85b0b133b5 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/linkcmds
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/linkcmds
@@ -21,13 +21,13 @@ RamSize = DEFINED(RamSize) ? RamSize : 4M;
 HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
  
 MEMORY
-	{
-	ram : org = 0x0, l = 4M
-	nvram : org = 0xfa000000, l = 32K
-	dpram : org = 0xfa200000, l = 16K
-	flash : org = 0xfc000000, l = 2M
-	immr  : org = 0xfa200000, l = 16K
-	}
+  {
+    ram : org = 0x0, l = 4M
+    nvram : org = 0xfa000000, l = 32K
+    dpram : org = 0xfa200000, l = 16K
+    flash : org = 0xfc000000, l = 2M
+    immr  : org = 0xfa200000, l = 16K
+  }
 
 
 SECTIONS
@@ -45,7 +45,7 @@ SECTIONS
    *  The stack will live in this area - between the vectors and
    *  the text section.
    */
-	
+  
   .text 0x10000:
   {
     /* Read-only sections, merged into text segment: */
@@ -58,10 +58,10 @@ SECTIONS
 
     /* Actual code */
     *(.text*)
-	     
+       
     /* C++ constructors/destructors */
     *(.gnu.linkonce.t*)
-	     
+       
     /*  Initialization and finalization code.
      *
      *  Various files can provide initialization and finalization functions.
@@ -91,14 +91,14 @@ SECTIONS
      *  end terminate with a NULL entry.
      */
      
-    PROVIDE (__CTOR_LIST__ = .);	     
+    PROVIDE (__CTOR_LIST__ = .);       
     /* LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) */
     *crtbegin.o(.ctors)
     *(.ctors)
     *crtend.o(.ctors)
     LONG(0)
     PROVIDE (__CTOR_END__ = .);
-	
+  
     PROVIDE (__DTOR_LIST__ = .);
     /* LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) */
     *crtbegin.o(.dtors)
@@ -106,7 +106,7 @@ SECTIONS
     *crtend.o(.dtors)
     LONG(0)
     PROVIDE (__DTOR_END__ = .);
-	
+  
     /*
      * Special FreeBSD sysctl sections.
      */
@@ -192,12 +192,6 @@ SECTIONS
     *(.data.*)
     *(.data1)
     
-    PROVIDE (__SDATA_START__ = .);
-    *(.sdata*)
-    *(.gnu.linkonce.d*)
-    *(.gnu.linkonce.s.*)
-    PROVIDE (__SDATA_END__ = .);
-    
     PROVIDE (__EXCEPT_START__ = .);
     *(.gcc_except_table*)
     PROVIDE (__EXCEPT_END__ = .);
@@ -206,7 +200,7 @@ SECTIONS
     *(.got.plt) 
     *(.got)
     PROVIDE(__GOT_END__ = .);
-	
+  
     *(.got1)
     
     PROVIDE (__GOT2_START__ = .);
@@ -214,40 +208,46 @@ SECTIONS
     *(.got2)
     PROVIDE (__GOT2_END__ = .);
     PROVIDE (_GOT2_END_ = .);
-	
+  
     PROVIDE (__FIXUP_START__ = .);
     PROVIDE (_FIXUP_START_ = .);
     *(.fixup)
     PROVIDE (_FIXUP_END_ = .);
     PROVIDE (__FIXUP_END__ = .);
+  } > ram
+  
+  .sdata : {
+    PROVIDE (_SDA_BASE_ = 32768);
+    *(.sdata .sdata.* .gnu.linkonce.s.*)
+  } > ram
 
-  /*  We want the small data sections together, so single-instruction offsets
-   *   can access them all.
-   */
-    PROVIDE (__SDATA2_START__ = .);
-    *(.sdata2)
-    *(.gnu.linkonce.s2.*)
-    *(.sbss2)
-    PROVIDE (__SDATA2_END__ = .);
+  .sbss : {
+    __bss_start = .;
+
+    PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
+    *(.scommon)
+    *(.dynsbss)
+    *(.sbss .sbss.* .gnu.linkonce.sb.*)
+    PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
   } > ram
-	
-	 
+
+  .sdata2 : {
+    PROVIDE (_SDA2_BASE_ = 32768);
+
+    *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+  } > ram =0
+
+  .sbss2 : {
+    *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+  } > ram =0
+   
   .bss :
   {
-    PROVIDE (__SBSS_START__ = .);
-	
-    PROVIDE (__SBSS2_START__ = .);
-    *(.sbss2)
-    PROVIDE (__SBSS2_END__ = .);
-	
     bss.start = .;
     *(.bss .bss* .gnu.linkonce.b*)
-    *(.sbss*)
     *(COMMON)
     . = ALIGN(4);
     bss.end = .;
-    
-   PROVIDE (__SBSS_END__ = .);
 
   } > ram
   
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog
index a829ecd862..3bd9b5857f 100644
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog
@@ -1,3 +1,7 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/mcp750.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am
index db1e1c0ce9..d42853d9bf 100644
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am
@@ -80,9 +80,7 @@ libbsp_a_SOURCES += \
     ../../powerpc/shared/console/uart.h
 
 include_bsp_HEADERS += ../../powerpc/shared/irq/irq.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
+	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
 
 # irq
 libbsp_a_SOURCES += ../../powerpc/shared/irq/irq_init.c \
@@ -133,11 +131,11 @@ libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c \
 
 libbsp_a_LIBADD = \
     polledIO.rel \
+    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am b/c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am
index 5ee563bf57..9b7ef80ce8 100644
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am
@@ -97,14 +97,6 @@ $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bsps
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
 $(PROJECT_INCLUDE)/bsp/motorola.h: ../../powerpc/shared/motorola/motorola.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/motorola.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/motorola.h
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog b/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
index f7eafe4aca..b43d1b77d7 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
@@ -1,3 +1,9 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am: Update for exception support changes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-21	Sebastian Huber <sebastian.huber@embedded-brains.de>
 
 	* network/smsc9218i.c, tests/tests.c: Update for interrupt handler
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
index ea9fad3b8b..394132bd30 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
@@ -83,7 +83,6 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/dspi.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/esci.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel
 
 if HAS_NETWORKING
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
index 32d3d42021..8f516d335a 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
@@ -25,12 +25,12 @@
 #include <rtems.h>
 
 #include <libcpu/powerpc-utility.h>
+#include <bsp/vectors.h>
 
 #include <bsp.h>
 #include <bsp/bootcard.h>
 #include <bsp/irq.h>
 #include <bsp/irq-generic.h>
-#include <bsp/ppc_exc_bspsupp.h>
 
 #define RTEMS_STATUS_CHECKS_USE_PRINTK
 
@@ -188,6 +188,7 @@ static void mpc55xx_ebi_init()
  */
 void bsp_start(void)
 {
+	rtems_status_code sc = RTEMS_SUCCESSFUL;
 	ppc_cpu_id_t myCpu;
 	ppc_cpu_revision_t myCpuRevision;
 
@@ -224,16 +225,21 @@ void bsp_start(void)
 	
 	/* Initialize exceptions */
 	RTEMS_DEBUG_PRINT( "Initialize exceptions ...\n");
-	ppc_exc_initialize(
-          PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
-          interrupt_stack_start,
-          interrupt_stack_size
-        );
-	DEBUG_DONE();
+	sc = ppc_exc_initialize(
+		PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
+		interrupt_stack_start,
+		interrupt_stack_size
+	);
+	if (sc != RTEMS_SUCCESSFUL) {
+		BSP_panic( "Cannot initialize exceptions");
+	} else {
+		DEBUG_DONE();
+	}
 
 	/* Initialize interrupts */
 	RTEMS_DEBUG_PRINT( "Initialize interrupts ...\n");
-	if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
+	sc = bsp_interrupt_initialize();
+	if (sc != RTEMS_SUCCESSFUL) {
 		BSP_panic( "Cannot initialize interrupts");
 	} else {
 		DEBUG_DONE();
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog b/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
index fe6e646958..e8ca505728 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
@@ -1,3 +1,12 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* include/irq-config.h: New file.
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	Use generic interrupt support.
+	* make/custom/mpc8260ads.cfg, startup/linkcmds: Enable EABI.
+	* irq/irq.c, startup/bspstart.c: Converted to generic interrupt
+	support.  Update for exception support changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/mpc8260ads.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am b/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am
index b9bb0c9eb9..9fa5325019 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am
@@ -35,11 +35,19 @@ libbsp_a_SOURCES += clock/p_clock.c
 # console
 libbsp_a_SOURCES += console/console.c
 
-include_bsp_HEADERS = irq/irq.h
+include_bsp_HEADERS = irq/irq.h \
+	include/irq-config.h \
+	../../shared/include/irq-generic.h \
+	../../shared/include/irq-info.h
+
 # irq
-libbsp_a_SOURCES += irq/irq.c irq/irq_init.c irq/irq.h irq/irq_asm.S
+libbsp_a_SOURCES += irq/irq.c \
+	../../shared/src/irq-generic.c \
+	../../shared/src/irq-legacy.c \
+	../../shared/src/irq-info.c \
+	../../shared/src/irq-shell.c \
+	../../shared/src/irq-server.c
 
-include_bsp_HEADERS += vectors/vectors.h
 # startup
 libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
     ../../shared/bsppredriverhook.c ../../shared/bsppost.c \
@@ -47,10 +55,6 @@ libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
     ../../shared/sbrk.c ../../shared/gnatinstallhandler.c startup/cpuinit.c \
     ../../shared/bspgetworkarea.c ../../shared/bsppretaskinghook.c
 
-# vectors
-libbsp_a_SOURCES += vectors/vectors_init.c vectors/vectors.h \
-    vectors/vectors.S
-
 if HAS_NETWORKING
 network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
 network_CPPFLAGS += -D__BSD_VISIBLE
@@ -63,12 +67,12 @@ endif
 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
+    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8260/clock.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8260/console-generic.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8260/cpm.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8260/mmu.rel \
-    ../../../libcpu/@RTEMS_CPU@/mpc8260/timer.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel
+    ../../../libcpu/@RTEMS_CPU@/mpc8260/timer.rel
 if HAS_NETWORKING
 libbsp_a_LIBADD += network.rel
 endif
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c
index 0859e00626..e7b212177e 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c
@@ -6,9 +6,9 @@
  *
  *  Modified for mpc8260 Andy Dachs <a.dachs@sstl.co.uk>
  *  Surrey Satellite Technology Limited, 2000
-+  *  	21/4/2002 Added support for nested interrupts and improved
-+  *  	masking operations.  Now we compute priority mask based
-+  * 		on table in irq_init.c
+ *    21/4/2002 Added support for nested interrupts and improved
+ *    masking operations.  Now we compute priority mask based
+ *     on table in irq_init.c
  *
  *  The license and distribution terms for this file may be
  *  found in found in the file LICENSE in this distribution or at
@@ -19,140 +19,118 @@
 
 #include <bsp.h>
 #include <bsp/irq.h>
+#include <bsp/irq-generic.h>
 #include <rtems.h>
-#include <rtems/score/apiext.h>
 #include <rtems/bspIo.h>
-#include <libcpu/raw_exception.h>
 #include <bsp/vectors.h>
 #include <mpc8260.h>
 
 /*
- * default handler connected on each irq after bsp initialization
- */
-static rtems_irq_connect_data	default_rtems_entry;
-
-/*
- * location used to store initial tables used for interrupt
- * management.
- */
-static rtems_irq_global_settings* 	internal_config;
-static rtems_irq_connect_data*		rtems_hdl_tbl;
-
-/*
  * Check if symbolic IRQ name is an CPM IRQ
  */
 static inline int is_cpm_irq(const rtems_irq_number irqLine)
 {
-	return (((int) irqLine <= BSP_CPM_IRQ_MAX_OFFSET) &
-			((int) irqLine >= BSP_CPM_IRQ_LOWEST_OFFSET)
-	);
-}
-
-/*
- * Check if symbolic IRQ name is a Processor IRQ
- */
-static inline int is_processor_irq(const rtems_irq_number irqLine)
-{
-	return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
-			((int) irqLine >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
-	);
+  return (((int) irqLine <= BSP_CPM_IRQ_MAX_OFFSET) &
+      ((int) irqLine >= BSP_CPM_IRQ_LOWEST_OFFSET)
+  );
 }
 
 typedef struct {
-	uint32_t         mask_h;	/* mask for sipnr_h and simr_h */
-	uint32_t         mask_l;	/* mask for sipnr_l and simr_l */
-	uint32_t         priority_h;  /* mask this and lower priority ints */
-	uint32_t         priority_l;
+  uint32_t         mask_h;  /* mask for sipnr_h and simr_h */
+  uint32_t         mask_l;  /* mask for sipnr_l and simr_l */
+  uint32_t         priority_h;  /* mask this and lower priority ints */
+  uint32_t         priority_l;
 } m82xxIrqMasks_t;
 
+static unsigned char irqPrioTable[BSP_CPM_IRQ_NUMBER]={
+  /*
+   * actual priorities for interrupt :
+   */
+  /*
+   * CPM Interrupts
+   */
+  0,  45, 63, 44, 66, 68, 35, 39, 50, 62, 34,  0,  30, 40, 52, 58,
+  2,  3,  0,  5,  15, 16, 17, 18, 49, 51,  0,  0,  0,  0,  0,  0,
+  6,  7,  8,  0,  11, 12, 0,  0,  20, 21, 22,  23, 0,  0,  0,  0,
+  29, 31, 33, 37, 38, 41, 47, 48, 55, 56, 57,  60, 64, 65, 69, 70,
+
+};
+
 /*
  *  Mask fields should have a '1' in the bit position for that
  *  interrupt.
- *	Priority masks calculated later based on priority table
+ *  Priority masks calculated later based on priority table
  */
 
 static m82xxIrqMasks_t SIU_MaskBit[BSP_CPM_IRQ_NUMBER] =
 {
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* err */
-	{ 0x00000000, 0x00008000, 0x00000000, 0x00000000 }, /* i2c */
-	{ 0x00000000, 0x00004000, 0x00000000, 0x00000000 }, /* spi */
-	{ 0x00000000, 0x00002000, 0x00000000, 0x00000000 }, /* rtt */
-	{ 0x00000000, 0x00001000, 0x00000000, 0x00000000 }, /* smc1 */
-	{ 0x00000000, 0x00000800, 0x00000000, 0x00000000 }, /* smc2 */
-	{ 0x00000000, 0x00000400, 0x00000000, 0x00000000 }, /* idma1 */
-	{ 0x00000000, 0x00000200, 0x00000000, 0x00000000 }, /* idma2 */
-	{ 0x00000000, 0x00000100, 0x00000000, 0x00000000 }, /* idma3 */
-	{ 0x00000000, 0x00000080, 0x00000000, 0x00000000 }, /* idma4 */
-	{ 0x00000000, 0x00000040, 0x00000000, 0x00000000 }, /* sdma */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000010, 0x00000000, 0x00000000 }, /* tmr1 */
-	{ 0x00000000, 0x00000008, 0x00000000, 0x00000000 }, /* tmr2 */
-	{ 0x00000000, 0x00000004, 0x00000000, 0x00000000 }, /* tmr3 */
-	{ 0x00000000, 0x00000002, 0x00000000, 0x00000000 }, /* tmr4 */
-	{ 0x00000004, 0x00000000, 0x00000000, 0x00000000 }, /* tmcnt */
-	{ 0x00000002, 0x00000000, 0x00000000, 0x00000000 }, /* pit */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00004000, 0x00000000, 0x00000000, 0x00000000 }, /* irq1 */
-	{ 0x00002000, 0x00000000, 0x00000000, 0x00000000 }, /* irq2 */
-	{ 0x00001000, 0x00000000, 0x00000000, 0x00000000 }, /* irq3 */
-	{ 0x00000800, 0x00000000, 0x00000000, 0x00000000 }, /* irq4 */
-	{ 0x00000400, 0x00000000, 0x00000000, 0x00000000 }, /* irq5 */
-	{ 0x00000200, 0x00000000, 0x00000000, 0x00000000 }, /* irq6 */
-	{ 0x00000100, 0x00000000, 0x00000000, 0x00000000 }, /* irq7 */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x80000000, 0x00000000, 0x00000000 }, /* fcc1 */
-	{ 0x00000000, 0x40000000, 0x00000000, 0x00000000 }, /* fcc2 */
-	{ 0x00000000, 0x20000000, 0x00000000, 0x00000000 }, /* fcc3 */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x08000000, 0x00000000, 0x00000000 }, /* mcc1 */
-	{ 0x00000000, 0x04000000, 0x00000000, 0x00000000 }, /* mcc2 */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00800000, 0x00000000, 0x00000000 }, /* scc1 */
-	{ 0x00000000, 0x00400000, 0x00000000, 0x00000000 }, /* scc2 */
-	{ 0x00000000, 0x00200000, 0x00000000, 0x00000000 }, /* scc3 */
-	{ 0x00000000, 0x00100000, 0x00000000, 0x00000000 }, /* scc4 */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
-	{ 0x00010000, 0x00000000, 0x00000000, 0x00000000 }, /* pc15 */
-	{ 0x00020000, 0x00000000, 0x00000000, 0x00000000 }, /* pc14 */
-	{ 0x00040000, 0x00000000, 0x00000000, 0x00000000 }, /* pc13 */
-	{ 0x00080000, 0x00000000, 0x00000000, 0x00000000 }, /* pc12 */
-	{ 0x00100000, 0x00000000, 0x00000000, 0x00000000 }, /* pc11 */
-	{ 0x00200000, 0x00000000, 0x00000000, 0x00000000 }, /* pc10 */
-	{ 0x00400000, 0x00000000, 0x00000000, 0x00000000 }, /* pc9 */
-	{ 0x00800000, 0x00000000, 0x00000000, 0x00000000 }, /* pc8 */
-	{ 0x01000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc7 */
-	{ 0x02000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc6 */
-	{ 0x04000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc5 */
-	{ 0x08000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc4 */
-	{ 0x10000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc3 */
-	{ 0x20000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc2 */
-	{ 0x40000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc1 */
-	{ 0x80000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc0 */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* err */
+  { 0x00000000, 0x00008000, 0x00000000, 0x00000000 }, /* i2c */
+  { 0x00000000, 0x00004000, 0x00000000, 0x00000000 }, /* spi */
+  { 0x00000000, 0x00002000, 0x00000000, 0x00000000 }, /* rtt */
+  { 0x00000000, 0x00001000, 0x00000000, 0x00000000 }, /* smc1 */
+  { 0x00000000, 0x00000800, 0x00000000, 0x00000000 }, /* smc2 */
+  { 0x00000000, 0x00000400, 0x00000000, 0x00000000 }, /* idma1 */
+  { 0x00000000, 0x00000200, 0x00000000, 0x00000000 }, /* idma2 */
+  { 0x00000000, 0x00000100, 0x00000000, 0x00000000 }, /* idma3 */
+  { 0x00000000, 0x00000080, 0x00000000, 0x00000000 }, /* idma4 */
+  { 0x00000000, 0x00000040, 0x00000000, 0x00000000 }, /* sdma */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000010, 0x00000000, 0x00000000 }, /* tmr1 */
+  { 0x00000000, 0x00000008, 0x00000000, 0x00000000 }, /* tmr2 */
+  { 0x00000000, 0x00000004, 0x00000000, 0x00000000 }, /* tmr3 */
+  { 0x00000000, 0x00000002, 0x00000000, 0x00000000 }, /* tmr4 */
+  { 0x00000004, 0x00000000, 0x00000000, 0x00000000 }, /* tmcnt */
+  { 0x00000002, 0x00000000, 0x00000000, 0x00000000 }, /* pit */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00004000, 0x00000000, 0x00000000, 0x00000000 }, /* irq1 */
+  { 0x00002000, 0x00000000, 0x00000000, 0x00000000 }, /* irq2 */
+  { 0x00001000, 0x00000000, 0x00000000, 0x00000000 }, /* irq3 */
+  { 0x00000800, 0x00000000, 0x00000000, 0x00000000 }, /* irq4 */
+  { 0x00000400, 0x00000000, 0x00000000, 0x00000000 }, /* irq5 */
+  { 0x00000200, 0x00000000, 0x00000000, 0x00000000 }, /* irq6 */
+  { 0x00000100, 0x00000000, 0x00000000, 0x00000000 }, /* irq7 */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x80000000, 0x00000000, 0x00000000 }, /* fcc1 */
+  { 0x00000000, 0x40000000, 0x00000000, 0x00000000 }, /* fcc2 */
+  { 0x00000000, 0x20000000, 0x00000000, 0x00000000 }, /* fcc3 */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x08000000, 0x00000000, 0x00000000 }, /* mcc1 */
+  { 0x00000000, 0x04000000, 0x00000000, 0x00000000 }, /* mcc2 */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00800000, 0x00000000, 0x00000000 }, /* scc1 */
+  { 0x00000000, 0x00400000, 0x00000000, 0x00000000 }, /* scc2 */
+  { 0x00000000, 0x00200000, 0x00000000, 0x00000000 }, /* scc3 */
+  { 0x00000000, 0x00100000, 0x00000000, 0x00000000 }, /* scc4 */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* reserved */
+  { 0x00010000, 0x00000000, 0x00000000, 0x00000000 }, /* pc15 */
+  { 0x00020000, 0x00000000, 0x00000000, 0x00000000 }, /* pc14 */
+  { 0x00040000, 0x00000000, 0x00000000, 0x00000000 }, /* pc13 */
+  { 0x00080000, 0x00000000, 0x00000000, 0x00000000 }, /* pc12 */
+  { 0x00100000, 0x00000000, 0x00000000, 0x00000000 }, /* pc11 */
+  { 0x00200000, 0x00000000, 0x00000000, 0x00000000 }, /* pc10 */
+  { 0x00400000, 0x00000000, 0x00000000, 0x00000000 }, /* pc9 */
+  { 0x00800000, 0x00000000, 0x00000000, 0x00000000 }, /* pc8 */
+  { 0x01000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc7 */
+  { 0x02000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc6 */
+  { 0x04000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc5 */
+  { 0x08000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc4 */
+  { 0x10000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc3 */
+  { 0x20000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc2 */
+  { 0x40000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc1 */
+  { 0x80000000, 0x00000000, 0x00000000, 0x00000000 }, /* pc0 */
 
 };
 
-void dump_irq_masks(void )
-{
-	int i;
-	for( i=0; i<BSP_CPM_IRQ_NUMBER;i++ )
-	{
-		printk( "%04d: %08X %08X\n",
-	 		i,
-	 		SIU_MaskBit[i].priority_h,
-		 	SIU_MaskBit[i].priority_l
-		);
-	}
-}
-
 /*
  * ------------------------ RTEMS Irq helper functions ----------------
  */
@@ -164,255 +142,68 @@ void dump_irq_masks(void )
  */
 static void compute_SIU_IvectMask_from_prio (void)
 {
-	/*
-	 * The actual masks defined
-	 * correspond to the priorities defined
-	 * for the SIU in irq_init.c.
-	 */
-
-	 int i,j;
-
-	 for( i=0; i<BSP_CPM_IRQ_NUMBER; i++ )
-	 {
-	 	for( j=0;j<BSP_CPM_IRQ_NUMBER; j++ )
-		 	if( internal_config->irqPrioTbl[j] < internal_config->irqPrioTbl[i] )
-		 	{
-				SIU_MaskBit[i].priority_h |= SIU_MaskBit[j].mask_h;
-				SIU_MaskBit[i].priority_l |= SIU_MaskBit[j].mask_l;
-			}
-	 }
+  /*
+   * The actual masks defined
+   * correspond to the priorities defined
+   * for the SIU in irq_init.c.
+   */
+
+   int i,j;
+
+   for( i=0; i<BSP_CPM_IRQ_NUMBER; i++ )
+   {
+     for( j=0;j<BSP_CPM_IRQ_NUMBER; j++ )
+       if( irqPrioTable[j] < irqPrioTable[i] )
+       {
+        SIU_MaskBit[i].priority_h |= SIU_MaskBit[j].mask_h;
+        SIU_MaskBit[i].priority_l |= SIU_MaskBit[j].mask_l;
+      }
+   }
 
 }
 
-/*
- * This function check that the value given for the irq line
- * is valid.
- */
-
-static int isValidInterrupt(int irq)
-{
-	if ( (irq < BSP_LOWEST_OFFSET) || (irq > BSP_MAX_OFFSET) )
-		return 0;
-	return 1;
-}
 
 int BSP_irq_enable_at_cpm(const rtems_irq_number irqLine)
 {
-	int cpm_irq_index;
+  int cpm_irq_index;
 
-	if (!is_cpm_irq(irqLine))
-		return 1;
+  if (!is_cpm_irq(irqLine))
+    return 1;
 
-	cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
+  cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
 
-	m8260.simr_h |= SIU_MaskBit[cpm_irq_index].mask_h;
-	m8260.simr_l |= SIU_MaskBit[cpm_irq_index].mask_l;
+  m8260.simr_h |= SIU_MaskBit[cpm_irq_index].mask_h;
+  m8260.simr_l |= SIU_MaskBit[cpm_irq_index].mask_l;
 
-	return 0;
+  return 0;
 }
 
 int BSP_irq_disable_at_cpm(const rtems_irq_number irqLine)
 {
-	int cpm_irq_index;
-
-	if (!is_cpm_irq(irqLine))
-		return 1;
-
-	cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
-
-	m8260.simr_h &= ~(SIU_MaskBit[cpm_irq_index].mask_h);
-	m8260.simr_l &= ~(SIU_MaskBit[cpm_irq_index].mask_l);
-
-	return 0;
-}
-
-int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine)
-{
-	int cpm_irq_index;
-
-	if (!is_cpm_irq(irqLine))
-		return 0;
-
-	cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
-
-	return ((m8260.simr_h & SIU_MaskBit[cpm_irq_index].mask_h) ||
-		    (m8260.simr_l & SIU_MaskBit[cpm_irq_index].mask_l));
-}
-
-/*
- * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
- */
-
-int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
-{
-	rtems_interrupt_level level;
-
-	if (!isValidInterrupt(irq->name)) {
-		printk( "not a valid intr\n" ) ;
-		return 0;
-	}
-	/*
-	 * Check if default handler is actually connected. If not issue an error.
-	 * You must first get the current handler via i386_get_current_idt_entry
-	 * and then disconnect it using i386_delete_idt_entry.
-	 * RATIONALE : to always have the same transition by forcing the user
-	 * to get the previous handler before accepting to disconnect.
-	 */
-	if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
-		printk( "Default handler not there\n" );
-		return 0;
-	}
-
-	rtems_interrupt_disable(level);
-
-	/*
-	 * store the data provided by user
-	 */
-	rtems_hdl_tbl[irq->name] = *irq;
-
-	if (is_cpm_irq(irq->name)) {
-	    /*
-	     * Enable interrupt at PIC level
-	     */
-	    BSP_irq_enable_at_cpm (irq->name);
-	}
-
-#if 0
-	if (is_processor_irq(irq->name)) {
-		/*
-		 * Should Enable exception at processor level but not needed.  Will restore
-		 * EE flags at the end of the routine anyway.
-		 */
-	}
-#endif
-
-	/*
-	 * Enable interrupt on device
-	 */
-	if (irq->on)
-		irq->on(irq);
-
-	rtems_interrupt_enable(level);
-
-	/*
-	    printk( "Enabled\n" );
-	*/
-	return 1;
-}
+  int cpm_irq_index;
 
-int BSP_get_current_rtems_irq_handler	(rtems_irq_connect_data* irq)
-{
-	if (!isValidInterrupt(irq->name)) {
-		return 0;
-	}
-	*irq = rtems_hdl_tbl[irq->name];
-	return 1;
-}
+  if (!is_cpm_irq(irqLine))
+    return 1;
 
-int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
-{
-	rtems_interrupt_level level;
-
-	if (!isValidInterrupt(irq->name)) {
-		return 0;
-	}
-	/*
-	 * Check if default handler is actually connected. If not issue an error.
-	 * You must first get the current handler via i386_get_current_idt_entry
-	 * and then disconnect it using i386_delete_idt_entry.
-	 * RATIONALE : to always have the same transition by forcing the user
-	 * to get the previous handler before accepting to disconnect.
-	 */
-	if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
-	  return 0;
-	}
-	rtems_interrupt_disable(level);
-
-	if (is_cpm_irq(irq->name)) {
-	  /*
-	   * disable interrupt at PIC level
-	   */
-	  BSP_irq_disable_at_cpm (irq->name);
-	}
-
-	if (is_processor_irq(irq->name)) {
-	  /*
-	   * disable exception at processor level
-	   */
-	}
-
-	/*
-	 * Disable interrupt on device
-	 */
-	if (irq->off)
-		irq->off(irq);
-
-	/*
-	 * restore the default irq value
-	 */
-	rtems_hdl_tbl[irq->name] = default_rtems_entry;
-
-	rtems_interrupt_enable(level);
-
-	return 1;
-}
+  cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
 
-/*
- * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
- */
+  m8260.simr_h &= ~(SIU_MaskBit[cpm_irq_index].mask_h);
+  m8260.simr_l &= ~(SIU_MaskBit[cpm_irq_index].mask_l);
 
-int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
-{
-	int                   i;
-	rtems_interrupt_level level;
-
-	/*
-	 * Store various code accelerators
-	 */
-	internal_config			= config;
-	default_rtems_entry		= config->defaultEntry;
-	rtems_hdl_tbl       	= config->irqHdlTbl;
-
-	/* Fill in priority masks */
-	compute_SIU_IvectMask_from_prio();
-
-	rtems_interrupt_disable(level);
-	/*
-	 * start with CPM IRQ
-	 */
-	for (i=BSP_CPM_IRQ_LOWEST_OFFSET; i < BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER ; i++) {
-		if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-			BSP_irq_enable_at_cpm (i);
-			if (rtems_hdl_tbl[i].on)
-				rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-		} else {
-			if (rtems_hdl_tbl[i].off)
-				rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-			BSP_irq_disable_at_cpm (i);
-		}
-	}
-
-	/*
-	 * finish with Processor exceptions handled like IRQ
-	 */
-	for (i=BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER; i++) {
-		if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-			if (rtems_hdl_tbl[i].on)
-				rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-		} else {
-			if (rtems_hdl_tbl[i].off)
-				rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-		}
-	}
-
-	rtems_interrupt_enable(level);
-	return 1;
+  return 0;
 }
-
-int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
-{
-	*config = internal_config;
-	return 0;
+                                                                                             
+int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine)                                  
+{                                                                                           
+       int cpm_irq_index;                                                                   
+                                                                                            
+       if (!is_cpm_irq(irqLine))                                                            
+               return 0;                                                                    
+                                                                                            
+       cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);                       
+                                                                                            
+       return ((m8260.simr_h & SIU_MaskBit[cpm_irq_index].mask_h) ||                        
+                   (m8260.simr_l & SIU_MaskBit[cpm_irq_index].mask_l));                     
 }
 
 #ifdef DISPATCH_HANDLER_STAT
@@ -424,116 +215,165 @@ volatile unsigned int maxLoop = 0;
  */
 int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
 {
-	register unsigned int irq;
+  register unsigned int irq;
 #if 0
-	register unsigned oldMask;		      /* old siu pic masks */
+  register unsigned oldMask;          /* old siu pic masks */
 #endif
-	register unsigned msr;
-	register unsigned new_msr;
-	register unsigned old_simr_h;
-	register unsigned old_simr_l;
+  register unsigned msr;
+  register unsigned new_msr;
+  register unsigned old_simr_h;
+  register unsigned old_simr_l;
 #ifdef DISPATCH_HANDLER_STAT
-	unsigned loopCounter;
+  unsigned loopCounter;
 #endif
 
-	/*
-	 * Handle decrementer interrupt
-	 */
-	if (excNum == ASM_DEC_VECTOR) {
-		_CPU_MSR_GET(msr);
-		new_msr = msr | MSR_EE;
-		_CPU_MSR_SET(new_msr);
+  /*
+   * Handle decrementer interrupt
+   */
+  if (excNum == ASM_DEC_VECTOR) {
+    _CPU_MSR_GET(msr);
+    new_msr = msr | MSR_EE;
+    _CPU_MSR_SET(new_msr);
 
-		rtems_hdl_tbl[BSP_DECREMENTER].hdl(rtems_hdl_tbl[BSP_DECREMENTER].handle);
+    bsp_interrupt_handler_dispatch(BSP_DECREMENTER);
 
-		_CPU_MSR_SET(msr);
+    _CPU_MSR_SET(msr);
 
-		return 0;
-	}
+    return 0;
+  }
 
-	/*
-	 * Handle external interrupt generated by SIU on PPC core
-	 */
+  /*
+   * Handle external interrupt generated by SIU on PPC core
+   */
 #ifdef DISPATCH_HANDLER_STAT
-	loopCounter = 0;
+  loopCounter = 0;
 #endif
 
-	while (1) {
+  while (1) {
 
-		if( ((m8260.sipnr_h & m8260.simr_h) | (m8260.sipnr_l & m8260.simr_l)) == 0 ) {
+    if( ((m8260.sipnr_h & m8260.simr_h) | (m8260.sipnr_l & m8260.simr_l)) == 0 ) {
 #ifdef DISPATCH_HANDLER_STAT
-			if (loopCounter >  maxLoop) maxLoop = loopCounter;
+      if (loopCounter >  maxLoop) maxLoop = loopCounter;
 #endif
-			break;
-		}
+      break;
+    }
 
-		irq = (m8260.sivec >> 26) + BSP_CPM_IRQ_LOWEST_OFFSET;
+    irq = (m8260.sivec >> 26) + BSP_CPM_IRQ_LOWEST_OFFSET;
 
-		/* Clear mask and pending register */
-		if( irq <= BSP_CPM_IRQ_MAX_OFFSET ) {
-			/* save interrupt masks */
-			old_simr_h = m8260.simr_h;
-			old_simr_l = m8260.simr_l;
+    /* Clear mask and pending register */
+    if( irq <= BSP_CPM_IRQ_MAX_OFFSET ) {
+      /* save interrupt masks */
+      old_simr_h = m8260.simr_h;
+      old_simr_l = m8260.simr_l;
 
-			/* mask off current interrupt and lower priority ones */
-			m8260.simr_h &= SIU_MaskBit[irq].priority_h;
-			m8260.simr_l &= SIU_MaskBit[irq].priority_l;
+      /* mask off current interrupt and lower priority ones */
+      m8260.simr_h &= SIU_MaskBit[irq].priority_h;
+      m8260.simr_l &= SIU_MaskBit[irq].priority_l;
 
-			/* clear pending bit */
-			m8260.sipnr_h |= SIU_MaskBit[irq].mask_h;
-			m8260.sipnr_l |= SIU_MaskBit[irq].mask_l;
+      /* clear pending bit */
+      m8260.sipnr_h |= SIU_MaskBit[irq].mask_h;
+      m8260.sipnr_l |= SIU_MaskBit[irq].mask_l;
 
-			/* 
-			 * make sure, that the masking operations in 
-			 * ICTL and MSR are executed in order
-			 */
-			asm volatile("sync":::"memory");
+      /* 
+       * make sure, that the masking operations in 
+       * ICTL and MSR are executed in order
+       */
+      asm volatile("sync":::"memory");
 
-			/* re-enable external exceptions */
-			_CPU_MSR_GET(msr);
-			new_msr = msr | MSR_EE;
-			_CPU_MSR_SET(new_msr);
+      /* re-enable external exceptions */
+      _CPU_MSR_GET(msr);
+      new_msr = msr | MSR_EE;
+      _CPU_MSR_SET(new_msr);
 
-			/* call handler */
-			rtems_hdl_tbl[irq].hdl(rtems_hdl_tbl[irq].handle);
+      /* call handler */
+      bsp_interrupt_handler_dispatch(irq);
 
-			/* disable exceptions again */
-			_CPU_MSR_SET(msr);
+      /* disable exceptions again */
+      _CPU_MSR_SET(msr);
 
-			/* 
-			 * make sure, that the masking operations in 
-			 * ICTL and MSR are executed in order
-			 */
-			asm volatile("sync":::"memory");
+      /* 
+       * make sure, that the masking operations in 
+       * ICTL and MSR are executed in order
+       */
+      asm volatile("sync":::"memory");
 
-			/* restore interrupt masks */
-			m8260.simr_h = old_simr_h;
-			m8260.simr_l = old_simr_l;
+      /* restore interrupt masks */
+      m8260.simr_h = old_simr_h;
+      m8260.simr_l = old_simr_l;
 
-		}
+    }
 #ifdef DISPATCH_HANDLER_STAT
-		++ loopCounter;
+    ++ loopCounter;
 #endif
-	}
-	return 0;
+  }
+  return 0;
+}
+
+/*
+ * Initialize CPM interrupt management
+ */
+void
+BSP_CPM_irq_init(void)
+{
+   m8260.simr_l = 0;
+   m8260.simr_h = 0;
+   m8260.sipnr_l = 0xffffffff;
+   m8260.sipnr_h = 0xffffffff;
+   m8260.sicr = 0;
+
+  /*
+   * Initialize the interrupt priorities.
+   */
+   m8260.siprr   = 0x05309770;	/* reset value */
+   m8260.scprr_h = 0x05309770;	/* reset value */
+   m8260.scprr_l = 0x05309770;	/* reset value */
+
+}
+
+rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
+{
+  if (is_cpm_irq(irqnum)) {
+    /*
+     * Enable interrupt at PIC level
+     */
+    BSP_irq_enable_at_cpm (irqnum);
+  }
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
+{
+  if (is_cpm_irq(irqnum)) {
+    /*
+     * disable interrupt at PIC level
+     */
+    BSP_irq_disable_at_cpm (irqnum);
+  }
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_facility_initialize()
+{
+  /* Install exception handler */
+  if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
+    return RTEMS_IO_ERROR;
+  }
+  if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
+    return RTEMS_IO_ERROR;
+  }
+
+  /* Fill in priority masks */
+  compute_SIU_IvectMask_from_prio();
+
+  /* Initialize the interrupt controller */
+  BSP_CPM_irq_init();
+
+  return RTEMS_SUCCESSFUL;
 }
 
-void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
+void bsp_interrupt_handler_default( rtems_vector_number vector)
 {
-	/*
-	 * Process pending signals that have not already been
-	 * processed by _Thread_Displatch. This happens quite
-	 * unfrequently : the ISR must have posted an action
-	 * to the current running thread.
-	 */
-	if ( _Thread_Do_post_task_switch_extension ||
-		_Thread_Executing->do_post_task_switch_extension ) {
-		_Thread_Executing->do_post_task_switch_extension = false;
-		_API_extensions_Run_postswitch();
-	}
-
-	/*
-	 * I plan to process other thread related events here.
-	 * This will include DEBUG session requested from keyboard...
-	 */
+  printk( "Spurious interrupt: 0x%08x\n", vector);
 }
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/make/custom/mpc8260ads.cfg b/c/src/lib/libbsp/powerpc/mpc8260ads/make/custom/mpc8260ads.cfg
index 00eb8d4de5..bfb6ab2362 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/make/custom/mpc8260ads.cfg
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/make/custom/mpc8260ads.cfg
@@ -14,7 +14,8 @@ RTEMS_CPU_MODEL=mpc8260
 #  and (hopefully) optimize for it. 
 #
 # CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -mstrict-align
-CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260
+CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260 \
+	-meabi -msdata -fno-common
 
 # optimize flag: typically -O2
 CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am b/c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am
index 369b491c12..d43f129cd1 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am
@@ -69,7 +69,15 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
+$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
+
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
+
+$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
 
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
index 194aeb542f..fc48062bbc 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
@@ -35,8 +35,6 @@
  *  $Id$
  */
 
-#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
-
 #include <bsp.h>
 
 /*
@@ -55,8 +53,6 @@
 
 SPR_RW(SPRG1)
 
-extern unsigned long intrStackPtr;
-
 /*
  *  Driver configuration parameters
  */
@@ -74,7 +70,9 @@ bool       bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
 void  _BSP_GPLED1_on(void);
 void  _BSP_GPLED0_on(void);
 void  cpu_init(void);
-void  initialize_exceptions(void);
+
+extern char IntrStack_start [];
+extern char intrStack [];
 
 void BSP_panic(char *s)
 {
@@ -150,10 +148,10 @@ void _BSP_Uart2_disable()
 
 void bsp_start(void)
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   extern void *_WorkspaceBase;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
-  register unsigned char* intrStack;
 
   /* Set MPC8260ADS board LEDS and Uart enable lines */
   _BSP_GPLED0_off();
@@ -173,21 +171,24 @@ void bsp_start(void)
 /*
   mmu_init();
 */
-  /*
-   * Initialize some SPRG registers related to irq handling
-   */
 
-  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
-  _write_SPRG1((unsigned int)intrStack);
+  /* Initialize exception handler */
+  /* FIXME: Interrupt stack begin and size */
+  sc = ppc_exc_initialize(
+    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
+    (uintptr_t) IntrStack_start,
+    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
+  );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot intitialize exceptions");
+  }
 
-/*
-  printk( "About to call initialize_exceptions\n" );
-*/
-   /*
-    * Install our own set of exception vectors
-    */
+  /* Initalize interrupt support */
+  sc = bsp_interrupt_initialize();
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot intitialize interrupts");
+  }
 
-   initialize_exceptions();
 
 /*
   mmu_init();
@@ -227,11 +228,6 @@ void bsp_start(void)
   m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
 */
 
-  /*
-   * Initalize RTEMS IRQ system
-   */
-  BSP_rtems_irq_mng_init(0);
-
 #ifdef SHOW_MORE_INIT_SETTINGS
   printk("Exit from bspstart\n");
 #endif
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds
index e194a19f9c..ca9d47d3cd 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds
@@ -208,29 +208,39 @@ SECTIONS
     .fixup	  : { *(.fixup) 	} >ram
     PROVIDE (_FIXUP_END_ = .);
     PROVIDE (__FIXUP_END__ = .);
+  
+    .sdata : {
+      PROVIDE (_SDA_BASE_ = 32768);
+      *(.sdata .sdata.* .gnu.linkonce.s.*)
+    } > ram
+ 
+    .sbss : {
+      __bss_start = .;
+ 
+      PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
+      *(.scommon)
+      *(.dynsbss)
+      *(.sbss .sbss.* .gnu.linkonce.sb.*)
+      PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
+    } > ram
+ 
+    .sdata2 : {
+      PROVIDE (_SDA2_BASE_ = 32768);
+ 
+      *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+    } > ram =0
+ 
+    .sbss2 : {
+      *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+    } > ram =0
 
-    PROVIDE (__SDATA2_START__ = .);
-    .sdata2   	  : { *(.sdata2) *(.gnu.linkonce.s2.*)	} >ram
-    .sbss2   	  : { *(.sbss2) *(.gnu.linkonce.sb2.*)	} >ram
-    PROVIDE (__SBSS2_END__ = .);
-
-    .sbss2   	  : { *(.sbss2) 	} >ram
-    PROVIDE (__SBSS2_END__ = .);
-
-    __SBSS_START__ = .;
     .bss :
     {
       bss.start = .;
       *(.bss .bss* .gnu.linkonce.b*)
-      *(.sbss*) *(COMMON)
       . = ALIGN(4);
       bss.end = .;
     } > ram
-    __SBSS_END__ = .;
-
-
-
-
 
     /* R/W Data */
     .data ( . ) :
diff --git a/c/src/lib/libbsp/powerpc/mvme3100/ChangeLog b/c/src/lib/libbsp/powerpc/mvme3100/ChangeLog
index 58390dce1f..bf52b0f067 100644
--- a/c/src/lib/libbsp/powerpc/mvme3100/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mvme3100/ChangeLog
@@ -1,3 +1,9 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq_init.c: Changed exception header file includes.
+	* startup/bspstart.c: Update for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/mvme3100.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am b/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am
index 9b0363f467..e153799c79 100644
--- a/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am
@@ -97,8 +97,6 @@ libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.c \
     ../../powerpc/shared/pci/pcifinddevice.c ../../powerpc/shared/pci/pci.h
 
 include_bsp_HEADERS += \
-  ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
-  ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
   ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
 
 include_bsp_HEADERS += vme/VMEConfig.h \
@@ -142,12 +140,12 @@ network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 endif
 
 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
+    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
     ../../../libcpu/@RTEMS_CPU@/e500/clock.rel \
     ../../../libcpu/@RTEMS_CPU@/e500/timer.rel \
     ../../../libcpu/@RTEMS_CPU@/e500/mmu.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel
 
diff --git a/c/src/lib/libbsp/powerpc/mvme3100/irq/irq_init.c b/c/src/lib/libbsp/powerpc/mvme3100/irq/irq_init.c
index e014e6b294..58f364b462 100644
--- a/c/src/lib/libbsp/powerpc/mvme3100/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/mvme3100/irq/irq_init.c
@@ -25,7 +25,7 @@
 #include <bsp/openpic.h>
 #include <bsp/irq.h>
 #include <bsp.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 #include <rtems/bspIo.h>
 
 static void nop_func(void *unused)
diff --git a/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am b/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am
index 3e0000f7ba..6edf483f13 100644
--- a/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am
@@ -89,14 +89,6 @@ $(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
 $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
diff --git a/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
index 635473707c..65da976c7f 100644
--- a/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
@@ -225,9 +225,10 @@ SPR_RW(HID1)
 
 void bsp_start( void )
 {
+rtems_status_code   sc;
 unsigned char       *stack;
-uint32_t            intrStackStart;
-uint32_t            intrStackSize;
+uintptr_t           intrStackStart;
+uintptr_t           intrStackSize;
 char                *chpt;
 ppc_cpu_id_t        myCpu;
 ppc_cpu_revision_t  myCpuRevision;
@@ -271,17 +272,20 @@ VpdBufRec          vpdData [] = {
 	/*
 	 * Initialize the interrupt related settings.
 	 */
-	intrStackStart = (uint32_t) __rtems_end;
+	intrStackStart = (uintptr_t) __rtems_end;
 	intrStackSize = rtems_configuration_get_interrupt_stack_size();
 
 	/*
 	 * Initialize default raw exception handlers.
 	 */
-	ppc_exc_initialize(
+	sc = ppc_exc_initialize(
 		PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
 		intrStackStart,
 		intrStackSize
 	);
+	if (sc != RTEMS_SUCCESSFUL) {
+		BSP_panic("cannot initialize exceptions");
+	}
 
 	printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog b/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
index 67dad3ca42..a85cef4c6a 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-23	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/BSP_irq.c, irq/irq_init.c, vectors/exceptionhandler.c: Changed
+	exception header file includes.
+	* startup/bspstart.c: Update for ppc_exc_initialize() changes.
+
 2009-10-23	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* irq/BSP_irq.c, network/if_100MHz/GT64260eth.c,
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am b/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
index 37e432dda1..c84714ea52 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
@@ -65,9 +65,7 @@ libbsp_a_SOURCES += ../../shared/tod.c tod/todcfg.c
 
 include_bsp_HEADERS += vectors/bspException.h
 include_bsp_HEADERS += \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
+	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
 
 # vectors
 libbsp_a_SOURCES += vectors/exceptionhandler.c \
@@ -120,7 +118,6 @@ libbsp_a_LIBADD = \
     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
index 854c152ea5..dc0e77b986 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
@@ -32,7 +32,6 @@
 #include <bsp/irq.h>
 #include <rtems/score/thread.h>
 #include <rtems/score/apiext.h>
-#include <libcpu/raw_exception.h>
 #include <rtems/rtems/intr.h>
 #include <libcpu/io.h>
 #include <libcpu/byteorder.h>
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/irq/irq_init.c b/c/src/lib/libbsp/powerpc/mvme5500/irq/irq_init.c
index d01b5541a2..913f37ef1c 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/irq/irq_init.c
@@ -18,7 +18,7 @@
 #include <libcpu/spr.h>
 #include <bsp/irq.h>
 #include <bsp.h>
-#include <libcpu/raw_exception.h>  /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
+#include <bsp/vectors.h>  /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
 /*#define  TRACE_IRQ_INIT*/
 
 /*
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/preinstall.am b/c/src/lib/libbsp/powerpc/mvme5500/preinstall.am
index 3ec5f8639d..48ab2a60c4 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/mvme5500/preinstall.am
@@ -89,18 +89,10 @@ $(PROJECT_INCLUDE)/bsp/bspException.h: vectors/bspException.h $(PROJECT_INCLUDE)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspException.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspException.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
 $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
 
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
 $(PROJECT_INCLUDE)/bsp/bspMvme5500.h: GT64260/bspMvme5500.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspMvme5500.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspMvme5500.h
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
index fe87da88b6..70fff644cd 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
@@ -216,6 +216,7 @@ save_boot_params(
 
 void bsp_start( void )
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
 #ifdef CONF_VPD
   int i;
 #endif
@@ -228,8 +229,8 @@ void bsp_start( void )
 #ifdef SHOW_LCR3_REGISTER
   unsigned l3cr;
 #endif
-  uint32_t intrStackStart;
-  uint32_t intrStackSize;
+  uintptr_t intrStackStart;
+  uintptr_t intrStackSize;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
   Triv121PgTbl  pt=0;
@@ -267,17 +268,20 @@ void bsp_start( void )
   /*
    * Initialize the interrupt related settings.
    */
-  intrStackStart = (uint32_t) __rtems_end;
+  intrStackStart = (uintptr_t) __rtems_end;
   intrStackSize = rtems_configuration_get_interrupt_stack_size();
 
   /*
    * Initialize default raw exception handlers.
    */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     intrStackStart,
     intrStackSize
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /*
    * Init MMU block address translation to enable hardware
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/vectors/exceptionhandler.c b/c/src/lib/libbsp/powerpc/mvme5500/vectors/exceptionhandler.c
index 698ef6d225..c11894cbd3 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/vectors/exceptionhandler.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/vectors/exceptionhandler.c
@@ -50,7 +50,6 @@
 
 #include <bsp.h>
 #include <bsp/vectors.h>
-#include <libcpu/raw_exception.h>
 #include <libcpu/spr.h>
 #include <bsp/pci.h>
 #include <rtems/bspIo.h>
@@ -60,9 +59,6 @@
 #define SRR1_TEA_EXC	(1<<(31-13))
 #define SRR1_MCP_EXC	(1<<(31-12))
 
-extern void
-BSP_printStackTrace(BSP_Exception_frame* excPtr);
-
 static volatile BSP_ExceptionExtension	BSP_exceptionExtension = 0;
 
 BSP_ExceptionExtension
diff --git a/c/src/lib/libbsp/powerpc/psim/ChangeLog b/c/src/lib/libbsp/powerpc/psim/ChangeLog
index be666d8ec1..46a21ab960 100644
--- a/c/src/lib/libbsp/powerpc/psim/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/psim/ChangeLog
@@ -1,3 +1,9 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq_init.c: Changed exception header file includes.
+	* startup/bspstart.c: Update for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/psim.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/psim/Makefile.am b/c/src/lib/libbsp/powerpc/psim/Makefile.am
index 4d06e35c03..bfc9a64d34 100644
--- a/c/src/lib/libbsp/powerpc/psim/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/psim/Makefile.am
@@ -57,10 +57,7 @@ EXTRA_DIST = vectors/README
 # vectors
 libbsp_a_SOURCES += vectors/align_h.S
 
-include_bsp_HEADERS += \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h	\
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h	\
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
+include_bsp_HEADERS += ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
 
 EXTRA_DIST += shmsupp/README
 if HAS_MP
@@ -74,10 +71,10 @@ libbsp_a_SOURCES += network/if_sim.c
 endif
 
 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
+    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
diff --git a/c/src/lib/libbsp/powerpc/psim/irq/irq_init.c b/c/src/lib/libbsp/powerpc/psim/irq/irq_init.c
index b8d2f70271..5ac5fb45f2 100644
--- a/c/src/lib/libbsp/powerpc/psim/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/psim/irq/irq_init.c
@@ -20,7 +20,7 @@
 #include <bsp/irq.h>
 #include <bsp.h>
 #include <psim.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 #include <rtems/bspIo.h>
 #include <bsp/openpic.h>
 
diff --git a/c/src/lib/libbsp/powerpc/psim/preinstall.am b/c/src/lib/libbsp/powerpc/psim/preinstall.am
index ff58a98377..92de148f02 100644
--- a/c/src/lib/libbsp/powerpc/psim/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/psim/preinstall.am
@@ -81,15 +81,7 @@ $(PROJECT_INCLUDE)/bsp/openpic.h: ../shared/openpic/openpic.h $(PROJECT_INCLUDE)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
 $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
 
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
diff --git a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c
index 2c0c74f090..3fe8df34c8 100644
--- a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c
@@ -79,8 +79,9 @@ void _BSP_Fatal_error(unsigned int v)
  */
 void bsp_start( void )
 {
-  uint32_t intrStackStart;
-  uint32_t intrStackSize;
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+  uintptr_t intrStackStart;
+  uintptr_t intrStackSize;
 
   /*
    * Note we can not get CPU identification dynamically, so
@@ -103,17 +104,20 @@ void bsp_start( void )
   /*
    * Initialize the interrupt related settings.
    */
-  intrStackStart = (uint32_t) __rtems_end;
+  intrStackStart = (uintptr_t) __rtems_end;
   intrStackSize = rtems_configuration_get_interrupt_stack_size();
 
   /*
    * Initialize default raw exception handlers.
    */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     intrStackStart,
     intrStackSize
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /*
    * Initalize RTEMS IRQ system
diff --git a/c/src/lib/libbsp/powerpc/qemuppc/ChangeLog b/c/src/lib/libbsp/powerpc/qemuppc/ChangeLog
index 227431f1ed..7968d97c86 100644
--- a/c/src/lib/libbsp/powerpc/qemuppc/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/qemuppc/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq_init.c: Changed exception header file includes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/qemuppc.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am b/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am
index b3da6dd133..d7adc31ea6 100644
--- a/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am
@@ -56,18 +56,10 @@ noinst_LIBRARIES += libbsp.a
 libbsp_a_SOURCES = $(startup_SOURCES) $(clock_SOURCES) $(console_SOURCES) \
     $(irq_SOURCES)
 
-#    ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel
-include_bsp_HEADERS +=  ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h	\
-                       ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h	\
-                       ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
-
-
 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
 
diff --git a/c/src/lib/libbsp/powerpc/qemuppc/irq/irq_init.c b/c/src/lib/libbsp/powerpc/qemuppc/irq/irq_init.c
index d1cc1e0520..f2787b0ec0 100644
--- a/c/src/lib/libbsp/powerpc/qemuppc/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/qemuppc/irq/irq_init.c
@@ -20,12 +20,10 @@
 #include <rtems.h>
 
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
 
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <bsp/vectors.h>
-#include <bsp/ppc_exc_bspsupp.h>
 
 int qemuppc_exception_handler( BSP_Exception_frame *frame, unsigned exception_number)
 {
@@ -55,6 +53,7 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
 		return RTEMS_IO_ERROR;
 	}
 
+	return RTEMS_SUCCESSFUL;
 }
 
 void bsp_interrupt_handler_default( rtems_vector_number vector)
diff --git a/c/src/lib/libbsp/powerpc/qemuppc/preinstall.am b/c/src/lib/libbsp/powerpc/qemuppc/preinstall.am
index 1216527715..306733fc24 100644
--- a/c/src/lib/libbsp/powerpc/qemuppc/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/qemuppc/preinstall.am
@@ -81,15 +81,3 @@ $(PROJECT_INCLUDE)/bsp/irq-config.h: irq/irq-config.h $(PROJECT_INCLUDE)/bsp/$(d
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
diff --git a/c/src/lib/libbsp/powerpc/qemuppc/startup/bspstart.c b/c/src/lib/libbsp/powerpc/qemuppc/startup/bspstart.c
index 751f9f3860..d8d089af74 100644
--- a/c/src/lib/libbsp/powerpc/qemuppc/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/qemuppc/startup/bspstart.c
@@ -16,19 +16,16 @@
 
 #include <string.h>
 #include <fcntl.h>
+
+#include <libcpu/bat.h>
+#include <libcpu/spr.h>
+#include <libcpu/powerpc-utility.h>
+
 #include <bsp.h>
 #include <bsp/irq.h>
+#include <bsp/vectors.h>
 #include <bsp/bootcard.h>
-#include <rtems/bspIo.h>
-#include <rtems/powerpc/powerpc.h>
-#include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
 #include <bsp/irq-generic.h>
-#include <bsp/ppc_exc_bspsupp.h>
-
-#include <libcpu/cpuIdent.h>
-#include <libcpu/bat.h>
-#include <libcpu/spr.h>
 
 /*
  * CPU Bus Frequency
@@ -65,10 +62,10 @@ static int default_decrementer_exception_handler( BSP_Exception_frame *frame, un
 
 void bsp_start( void )
 {
-  uint32_t intrStackStart;
-  uint32_t intrStackSize;
-  int rv = 0;
-  rtems_status_code sc;
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+  uintptr_t intrStackStart;
+  uintptr_t intrStackSize;
+
   /*
    * Note we can not get CPU identification dynamically, so
    * force current_ppc_cpu.
@@ -86,30 +83,33 @@ void bsp_start( void )
   /*
    * Initialize the interrupt related settings.
    */
-  intrStackStart = (uint32_t) bsp_interrupt_stack_start;
-  intrStackSize =  (uint32_t) bsp_interrupt_stack_size;
+  intrStackStart = (uintptr_t) bsp_interrupt_stack_start;
+  intrStackSize =  (uintptr_t) bsp_interrupt_stack_size;
 
   BSP_mem_size = (uint32_t )RamSize;
 
   /*
    * Initialize default raw exception handlers.
    */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     intrStackStart,
     intrStackSize
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /* Install default handler for the decrementer exception */
-  rv = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler);
-  if (rv < 0) {
-    BSP_panic( "Cannot install decrementer exception handler!\n");
+  sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler);
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot install decrementer exception handler");
   }
 
   /* Initalize interrupt support */
   sc = bsp_interrupt_initialize();
   if (sc != RTEMS_SUCCESSFUL) {
-    BSP_panic( "Cannot intitialize interrupt support\n");
+    BSP_panic("cannot intitialize interrupts");
   }
 
 #if 0
diff --git a/c/src/lib/libbsp/powerpc/score603e/ChangeLog b/c/src/lib/libbsp/powerpc/score603e/ChangeLog
index f2550fedd9..09d06133c6 100644
--- a/c/src/lib/libbsp/powerpc/score603e/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/score603e/ChangeLog
@@ -1,3 +1,11 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq.c, irq/irq_init.c, irq/no_pic.c: Changed exception header
+	file includes.  Fixes for type changes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/score603e.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/score603e/Makefile.am b/c/src/lib/libbsp/powerpc/score603e/Makefile.am
index a579cc95ec..1421cc212d 100644
--- a/c/src/lib/libbsp/powerpc/score603e/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/score603e/Makefile.am
@@ -46,8 +46,6 @@ pci_SOURCES = PCI_bus/flash.c ../../powerpc/shared/pci/pci.c \
     ../../powerpc/shared/pci/pcifinddevice.c  PCI_bus/PCI.c  PCI_bus/universe.c
 
 include_bsp_HEADERS += irq/irq.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
-	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
 	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
 
 irq_SOURCES =  irq/no_pic.c irq/irq_init.c \
@@ -70,13 +68,13 @@ libbsp_a_SOURCES = $(pclock_SOURCES) $(console_SOURCES) $(irq_SOURCES) \
     $(pci_SOURCES) $(vectors_SOURCES) $(startup_SOURCES) 
 
 libbsp_a_LIBADD = \
+    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
      ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
 
diff --git a/c/src/lib/libbsp/powerpc/score603e/irq/irq.c b/c/src/lib/libbsp/powerpc/score603e/irq/irq.c
index aab4095a7c..8fab2c653e 100644
--- a/c/src/lib/libbsp/powerpc/score603e/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/score603e/irq/irq.c
@@ -16,7 +16,6 @@
 #include <bsp/irq.h>
 #include <bsp/VME.h>
 #include <rtems/score/apiext.h>  /* for post ISR signal processing */
-#include <libcpu/raw_exception.h>
 #include <libcpu/io.h>
 #include <bsp/vectors.h>
 #include <stdlib.h>
diff --git a/c/src/lib/libbsp/powerpc/score603e/irq/irq_init.c b/c/src/lib/libbsp/powerpc/score603e/irq/irq_init.c
index ea0e257a2e..a7c223800e 100644
--- a/c/src/lib/libbsp/powerpc/score603e/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/score603e/irq/irq_init.c
@@ -24,7 +24,7 @@
 #include <bsp/residual.h>
 #include <bsp/irq.h>
 #include <bsp.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 #include <rtems/bspIo.h>
 
 #define SHOW_ISA_PCI_BRIDGE_SETTINGS 1
diff --git a/c/src/lib/libbsp/powerpc/score603e/irq/no_pic.c b/c/src/lib/libbsp/powerpc/score603e/irq/no_pic.c
index c30fb20156..f0cc12db6f 100644
--- a/c/src/lib/libbsp/powerpc/score603e/irq/no_pic.c
+++ b/c/src/lib/libbsp/powerpc/score603e/irq/no_pic.c
@@ -16,7 +16,7 @@
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <bsp/irq_supp.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 
 static rtems_irq_connect_data *rtems_hdl_tbl;
 static rtems_irq_connect_data  dflt_entry;
@@ -25,7 +25,7 @@ static rtems_irq_connect_data  dflt_entry;
  * High level IRQ handler called from shared_raw_irq_code_entry
  */
 int C_dispatch_irq_handler(
-  struct _BSP_Exception_frame *frame,
+  BSP_Exception_frame *frame,
   unsigned int excNum
 )
 {
diff --git a/c/src/lib/libbsp/powerpc/score603e/preinstall.am b/c/src/lib/libbsp/powerpc/score603e/preinstall.am
index d614aa8fa4..4d2f767519 100644
--- a/c/src/lib/libbsp/powerpc/score603e/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/score603e/preinstall.am
@@ -93,14 +93,6 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
 
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
 $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
index 9b488bd024..bbca59dd79 100644
--- a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
@@ -157,10 +157,11 @@ void initialize_PMC(void) {
 
 void bsp_start( void )
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   unsigned char        *work_space_start;
   unsigned int         msr_value = 0x0000;
-  uint32_t             intrStackStart;
-  uint32_t             intrStackSize;
+  uintptr_t            intrStackStart;
+  uintptr_t            intrStackSize;
   volatile uint32_t    *ptr;
   ppc_cpu_id_t         myCpu;
   ppc_cpu_revision_t   myCpuRevision;
@@ -190,7 +191,7 @@ void bsp_start( void )
   /*
    * Initialize the interrupt related settings.
    */
-  intrStackStart = (uint32_t) __rtems_end;
+  intrStackStart = (uintptr_t) __rtems_end;
   intrStackSize = rtems_configuration_get_interrupt_stack_size();
   printk("Interrupt Stack Start: 0x%x Size: 0x%x  Heap Start: 0x%x\n",
     intrStackStart, intrStackSize, BSP_heap_start
@@ -203,11 +204,14 @@ void bsp_start( void )
   /*
    * Initialize default raw exception handlers.
    */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     intrStackStart,
     intrStackSize
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   msr_value = 0x2030;
   _CPU_MSR_SET( msr_value );
diff --git a/c/src/lib/libbsp/powerpc/shared/clock/clock.c b/c/src/lib/libbsp/powerpc/shared/clock/clock.c
index 090c4d0f5c..e40cd2078e 100644
--- a/c/src/lib/libbsp/powerpc/shared/clock/clock.c
+++ b/c/src/lib/libbsp/powerpc/shared/clock/clock.c
@@ -23,9 +23,7 @@
 #include <rtems/clockdrv.h>
 
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
-
-#include <bsp/ppc_exc_bspsupp.h>
+#include <bsp/vectors.h>
 
 #define RTEMS_STATUS_CHECKS_USE_PRINTK
 
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c b/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c
index 9c2c27f954..a33e331228 100644
--- a/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c
@@ -26,7 +26,6 @@
 #include <bsp/irq.h>
 #include <bsp/irq_supp.h>
 #include <bsp.h>
-#include <libcpu/raw_exception.h>
 #include <bsp/motorola.h>
 #include <rtems/bspIo.h>
 
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/openpic_i8259_irq.c b/c/src/lib/libbsp/powerpc/shared/irq/openpic_i8259_irq.c
index be3b11470d..63d0d82f1b 100644
--- a/c/src/lib/libbsp/powerpc/shared/irq/openpic_i8259_irq.c
+++ b/c/src/lib/libbsp/powerpc/shared/irq/openpic_i8259_irq.c
@@ -21,7 +21,6 @@
 #include <bsp/VMEConfig.h>
 #endif
 #include <bsp/openpic.h>
-#include <libcpu/raw_exception.h>
 #include <libcpu/io.h>
 #include <bsp/vectors.h>
 #include <stdlib.h>
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
index b68aa3769a..bfab28aa31 100644
--- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
@@ -140,11 +140,12 @@ unsigned int get_eumbbar(void) {
 
 void bsp_start( void )
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
 #if !defined(mvme2100)
   unsigned l2cr;
 #endif
-  uint32_t intrStackStart;
-  uint32_t intrStackSize;
+  uintptr_t intrStackStart;
+  uintptr_t intrStackSize;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
   prep_t boardManufacturer;
@@ -210,17 +211,20 @@ void bsp_start( void )
   /*
    * Initialize the interrupt related settings.
    */
-  intrStackStart = (uint32_t) __rtems_end;
+  intrStackStart = (uintptr_t) __rtems_end;
   intrStackSize = rtems_configuration_get_interrupt_stack_size();
 
   /*
    * Initialize default raw exception handlers.
    */
-  ppc_exc_initialize(
+  sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     intrStackStart,
     intrStackSize
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   select_console(CONSOLE_LOG);
 
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog b/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog
index 39ea46ea14..3176e9422e 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq.c: Changed exception header file includes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-21  Thomas Doerfler  <Thomas.Doerfler@imd-systems.de>
 
 	* ChangeLog, Makefile.am, console/console.c, include/bsp.h, irq/irq.c, preinstall.am, startup/bspstart.c, startup/start.S:
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am b/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
index 5cf4345d39..b73416dfb0 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
@@ -22,10 +22,8 @@ noinst_PROGRAMS =
 include_HEADERS += include/coverhd.h
 include_bsp_HEADERS = include/tqm.h include/8xx_immap.h \
     include/irq.h include/irq-config.h \
-    ../../shared/include/irq-generic.h\
-    spi/spi.h\
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
+    ../../shared/include/irq-generic.h \
+    spi/spi.h
 
 EXTRA_DIST = times-tqm866
 
@@ -78,7 +76,6 @@ libbsp_a_LIBADD = \
     ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/console-generic.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/cpm.rel \
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
index d01542e8fa..2e3e9ef02e 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
@@ -26,12 +26,10 @@
 #include <mpc8xx.h>
 
 #include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
+#include <bsp/vectors.h>
 
 #include <bsp.h>
 #include <bsp/irq.h>
-#include <bsp/vectors.h>
-#include <bsp/ppc_exc_bspsupp.h>
 #include <bsp/irq-generic.h>
 /*
  * functions to enable/disable a source at the SIU/CPM irq controller
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am b/c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am
index a73f10070b..ead2a6f365 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am
@@ -81,14 +81,6 @@ $(PROJECT_INCLUDE)/bsp/spi.h: spi/spi.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/spi.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/spi.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
 $(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
 TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
index a7d2a3d2d6..fa1c5e94a1 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
@@ -20,14 +20,16 @@
  * $Id$
  */
 
-#include <rtems.h>
 #include <stdlib.h>
+
+#include <rtems.h>
+
 #include <libcpu/powerpc-utility.h>
 
 #include <bsp.h>
+#include <bsp/vectors.h>
 #include <bsp/bootcard.h>
 #include <bsp/irq-generic.h>
-#include <bsp/ppc_exc_bspsupp.h>
 
 #ifdef BSP_HAS_TQMMON
 /*
@@ -124,11 +126,12 @@ rtems_status_code  bsp_tqm_get_cib_uint32( const char *cib_id,
 
 void bsp_start( void)
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
 
-  uint32_t interrupt_stack_start = (uint32_t) bsp_interrupt_stack_start;
-  uint32_t interrupt_stack_size = (uint32_t) bsp_interrupt_stack_size;
+  uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start;
+  uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_size;
 
   /*
    * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -177,14 +180,19 @@ void bsp_start( void)
   bsp_timer_average_overhead = 3;
 
   /* Initialize exception handler */
-  ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
-		     interrupt_stack_start,
-		     interrupt_stack_size
-		     );
+  sc = ppc_exc_initialize(
+    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
+    interrupt_stack_start,
+    interrupt_stack_size
+  );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /* Initalize interrupt support */
-  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
-    BSP_panic("Cannot intitialize interrupt support\n");
+  sc = bsp_interrupt_initialize();
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot intitialize interrupts");
   }
 
 #ifdef SHOW_MORE_INIT_SETTINGS
diff --git a/c/src/lib/libbsp/powerpc/virtex/ChangeLog b/c/src/lib/libbsp/powerpc/virtex/ChangeLog
index 929bdf0390..e198e8824c 100644
--- a/c/src/lib/libbsp/powerpc/virtex/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/virtex/ChangeLog
@@ -1,3 +1,10 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Update for exception support changes.
+	* irq/irq.c: Changed exception header file includes.
+	* startup/bspstart.c: Changed exception header file includes.  Update
+	for ppc_exc_initialize() changes.
+
 2009-10-21	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* make/custom/virtex.cfg: Remove RTEMS_BSP_FAMILY.
diff --git a/c/src/lib/libbsp/powerpc/virtex/Makefile.am b/c/src/lib/libbsp/powerpc/virtex/Makefile.am
index 9b932c20d5..48d9909ea3 100644
--- a/c/src/lib/libbsp/powerpc/virtex/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/virtex/Makefile.am
@@ -53,10 +53,6 @@ include_bsp_HEADERS += irq/irq.h
 # irq
 libbsp_a_SOURCES += irq/irq_init.c
 
-include_bsp_HEADERS +=  \
-  ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
-  ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
-
 if HAS_NETWORKING
 network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
 network_CPPFLAGS += -D__BSD_VISIBLE
@@ -68,8 +64,8 @@ endif
 
 libbsp_a_LIBADD = \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
+    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/ppc403/clock.rel \
     ../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel \
diff --git a/c/src/lib/libbsp/powerpc/virtex/irq/irq_init.c b/c/src/lib/libbsp/powerpc/virtex/irq/irq_init.c
index e50c09e90d..a4a8991599 100644
--- a/c/src/lib/libbsp/powerpc/virtex/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/virtex/irq/irq_init.c
@@ -22,7 +22,6 @@
 #include <libcpu/spr.h>
 #include <bsp/irq.h>
 #include <bsp.h>
-#include <libcpu/raw_exception.h>
 #include <rtems/bspIo.h>
 #include <rtems/powerpc/powerpc.h>
 #include <bsp/vectors.h>
diff --git a/c/src/lib/libbsp/powerpc/virtex/preinstall.am b/c/src/lib/libbsp/powerpc/virtex/preinstall.am
index d5efb1f077..d7327889ee 100644
--- a/c/src/lib/libbsp/powerpc/virtex/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/virtex/preinstall.am
@@ -82,11 +82,3 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
 
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
diff --git a/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c b/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c
index 21b4f5bd47..72296ab8c1 100644
--- a/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c
@@ -104,6 +104,7 @@ void bsp_XAssertHandler(const char* file, int line) {
  */
 void bsp_start( void )
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   extern unsigned char IntrStack_start[];
   extern unsigned char IntrStack_end[];
   ppc_cpu_id_t myCpu;
@@ -135,11 +136,14 @@ void bsp_start( void )
   /*
    * Initialize default raw exception handlers. 
    */
-  ppc_exc_initialize(
-	PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
-	(uint32_t)IntrStack_start,
-	IntrStack_end - IntrStack_start
+  sc = ppc_exc_initialize(
+    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
+    (uint32_t)IntrStack_start,
+    IntrStack_end - IntrStack_start
   );
+  if (sc != RTEMS_SUCCESSFUL) {
+    BSP_panic("cannot initialize exceptions");
+  }
 
   /*
    * Install our own set of exception vectors
diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index 19b078ceba..f3a247cc88 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,3 +1,29 @@
+2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* new-exceptions/bspsupport/ppc-code-copy.c,
+	new-exceptions/bspsupport/ppc_exc_address.c,
+	new-exceptions/bspsupport/ppc_exc_categories.c,
+	new-exceptions/bspsupport/ppc_exc_global_handler.c,
+	new-exceptions/bspsupport/ppc_exc_initialize.c,
+	new-exceptions/bspsupport/ppc_exc_naked.S,
+	new-exceptions/bspsupport/ppc_exc_prologue.c: New files.
+	* new-exceptions/bspsupport/irq.c,
+	new-exceptions/bspsupport/irq_supp.h,
+	new-exceptions/bspsupport/ppc_exc_asm_macros.h: Changed exception
+	header file includes.  Fixes for type changes.
+	* new-exceptions/bspsupport/vectors.h: Reformatted.  Documentation.
+	Removed parts that belong to the raw exception API.  Added
+	declarations from files "new-exceptions/raw_exception.h" and
+	"bspsupport/ppc_exc_bspsupp.h".
+	* new-exceptions/bspsupport/ppc_exc_hdl.c: Reformatted.  Removed parts
+	that belong to the raw exception API.
+	* new-exceptions/bspsupport/ppc_exc_bspsupp.h: Added prologue template.
+	* new-exceptions/bspsupport/ppc_exc.S: Fixed
+	ppc_exc_tgpr_clr_prolog_size.
+	* shared/include/powerpc-utility.h: Reformatted.  Include more files
+	for ASM.
+	* shared/include/cpuIdent.h: Added ppc_cpu_current() and ppc_cpu_is().
+
 2009-10-22	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* new-exceptions/bspsupport/vectors_init.c: Remove duplicate
diff --git a/c/src/lib/libcpu/powerpc/Makefile.am b/c/src/lib/libcpu/powerpc/Makefile.am
index 7393193d5a..71bd026bb7 100644
--- a/c/src/lib/libcpu/powerpc/Makefile.am
+++ b/c/src/lib/libcpu/powerpc/Makefile.am
@@ -15,6 +15,10 @@ include_libcpudir = $(includedir)/libcpu
 
 include_libcpu_HEADERS = shared/include/powerpc-utility.h
 
+include_bspdir = $(includedir)/bsp
+
+include_bsp_HEADERS =
+
 EXTRA_DIST =
 
 noinst_PROGRAMS = new-exceptions/rtems-cpu.rel
@@ -25,19 +29,20 @@ new_exceptions_rtems_cpu_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 
 
 if !mpc5xx
-include_libcpu_HEADERS += new-exceptions/raw_exception.h
-noinst_PROGRAMS += new-exceptions/raw_exception.rel
-new_exceptions_raw_exception_rel_SOURCES = new-exceptions/raw_exception.c \
-    new-exceptions/asm_utils.S \
-	new-exceptions/e500_raw_exc_init.c
-new_exceptions_raw_exception_rel_CPPFLAGS = $(AM_CPPFLAGS)
-new_exceptions_raw_exception_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+include_bsp_HEADERS += new-exceptions/bspsupport/vectors.h
 
 noinst_PROGRAMS += new-exceptions/exc_bspsupport.rel
 new_exceptions_exc_bspsupport_rel_SOURCES = \
+    new-exceptions/bspsupport/ppc-code-copy.c \
     new-exceptions/bspsupport/ppc_exc.S \
+    new-exceptions/bspsupport/ppc_exc_naked.S \
     new-exceptions/bspsupport/ppc_exc_hdl.c \
-    new-exceptions/bspsupport/vectors_init.c
+    new-exceptions/bspsupport/ppc_exc_initialize.c \
+    new-exceptions/bspsupport/ppc_exc_global_handler.c \
+    new-exceptions/bspsupport/ppc_exc_categories.c \
+    new-exceptions/bspsupport/ppc_exc_address.c \
+    new-exceptions/bspsupport/ppc_exc_prologue.c
+
 new_exceptions_exc_bspsupport_rel_CPPFLAGS = $(AM_CPPFLAGS)
 new_exceptions_exc_bspsupport_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 
@@ -50,7 +55,6 @@ endif
 
 EXTRA_DIST += new-exceptions/bspsupport/vectors.h
 EXTRA_DIST += new-exceptions/bspsupport/irq_supp.h
-EXTRA_DIST += new-exceptions/bspsupport/ppc_exc_bspsupp.h
 EXTRA_DIST += new-exceptions/bspsupport/README
 EXTRA_DIST += new-exceptions/bspsupport/nest_irq_test.c
 EXTRA_DIST += new-exceptions/bspsupport/ppc_exc_test.c
@@ -357,11 +361,6 @@ endif
 if mpc83xx
 
 # Includes
-include_bspdir = $(includedir)/bsp
-
-include_bsp_HEADERS = new-exceptions/bspsupport/vectors.h \
-	new-exceptions/bspsupport/ppc_exc_bspsupp.h
-
 include_mpc83xxdir = $(includedir)/mpc83xx
 
 include_mpc83xx_HEADERS = mpc83xx/include/mpc83xx.h
@@ -407,12 +406,6 @@ endif
 if mpc55xx
 
 # Includes
-include_bspdir = $(includedir)/bsp
-
-include_bsp_HEADERS = new-exceptions/bspsupport/vectors.h \
-	new-exceptions/bspsupport/ppc_exc_bspsupp.h \
-	mpc55xx/include/irq.h
-
 include_mpc55xxdir = $(includedir)/mpc55xx
 
 include_mpc55xx_HEADERS = mpc55xx/include/regs.h \
@@ -424,6 +417,8 @@ include_mpc55xx_HEADERS = mpc55xx/include/regs.h \
 	mpc55xx/include/esci.h \
 	mpc55xx/include/watchdog.h
 
+include_bsp_HEADERS += mpc55xx/include/irq.h
+
 # IRQ
 noinst_PROGRAMS += mpc55xx/irq.rel
 mpc55xx_irq_rel_SOURCES = mpc55xx/irq/irq.c
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/irq/irq.c b/c/src/lib/libcpu/powerpc/mpc55xx/irq/irq.c
index 34d5bef763..1de4f7e6b3 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/irq/irq.c
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/irq/irq.c
@@ -20,12 +20,11 @@
 
 #include <mpc55xx/regs.h>
 
-#include <libcpu/raw_exception.h>
 #include <libcpu/powerpc-utility.h>
 
 #include <bsp/irq.h>
+#include <bsp/vectors.h>
 #include <bsp/irq-generic.h>
-#include <bsp/ppc_exc_bspsupp.h>
 
 #define RTEMS_STATUS_CHECKS_USE_PRINTK
 
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
index 4f430cefc1..a81ed2d119 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
@@ -69,7 +69,6 @@
 #ifdef	DEBUG_EXC
 #include <bsp.h>
 #include <bsp/vectors.h>
-#include <libcpu/raw_exception.h>
 #endif
 #endif
 
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c
index 6b3d218e60..96495640e3 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c
@@ -16,10 +16,7 @@
 #include <rtems.h>
 #include "irq_supp.h"
 #include <rtems/score/apiext.h>  /* for post ISR signal processing */
-#include <libcpu/raw_exception.h>
-#include <libcpu/cpuIdent.h>
-#include "vectors.h"
-#include "ppc_exc_bspsupp.h"
+#include <bsp/vectors.h>
 #include <stdlib.h>
 #include <rtems/bspIo.h> /* for printk */
 #include <libcpu/spr.h>
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq_supp.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq_supp.h
index 110f00c845..529c98c1f5 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq_supp.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq_supp.h
@@ -24,9 +24,10 @@
 #endif
 
 #include <rtems.h>
-#include <stdint.h>
 #include <rtems/irq.h>
 
+#include <bsp/vectors.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -51,8 +52,6 @@ extern int  BSP_disable_irq_at_pic(const rtems_irq_number irqLine);
  */
 extern int  BSP_setup_the_pic(rtems_irq_global_settings* config);
 
-struct _BSP_Exception_frame;
-
 /* IRQ dispatcher to be defined by the PIC driver; note that it MUST
  * implement shared interrupts.
  * Note also that the exception frame passed to this handler is not very
@@ -64,7 +63,7 @@ struct _BSP_Exception_frame;
  * uncaught exception.
  *******************************************************************
  */
-int C_dispatch_irq_handler (struct _BSP_Exception_frame *frame, unsigned int excNum);
+int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum);
 
 /*
  * Snippet to be used by PIC drivers and by bsp_irq_dispatch_list
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S
index 90b295d20f..b4d62a3491 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S
@@ -64,6 +64,9 @@ ppc_exc_min_prolog_auto:
 	mflr	VECTOR_REGISTER
 	bla	wrap_auto
 
+	.global ppc_exc_tgpr_clr_prolog_size
+ppc_exc_tgpr_clr_prolog_size = . - ppc_exc_tgpr_clr_prolog
+
 /**
  * @brief Use vector offsets with 16 byte boundaries.
  *
@@ -76,9 +79,6 @@ ppc_exc_min_prolog_auto_packed:
 	mflr	VECTOR_REGISTER
 	bla	wrap_auto_packed
 
-	.global ppc_exc_tgpr_clr_prolog_size
-ppc_exc_tgpr_clr_prolog_size = . - ppc_exc_tgpr_clr_prolog
-
 /*
  * Automatic vector, asynchronous exception; however,
  * automatic vector calculation is less efficient than
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
index 9739bf76df..f4ab803624 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
@@ -12,10 +12,7 @@
  * reintroduce such statements.
  */
 
-#include <libcpu/powerpc-utility.h>
-#include <libcpu/raw_exception.h>
-
-#include "vectors.h"
+#include <bsp/vectors.h>
 
 #define LT(cr) ((cr)*4+0)
 #define GT(cr) ((cr)*4+1)
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h
index 5c1cb34c73..55fe5c1a1d 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h
@@ -117,6 +117,7 @@ extern void ppc_exc_min_prolog_async_tmpl_bookE_crit(void);
 extern void ppc_exc_min_prolog_sync_tmpl_bookE_crit(void);
 extern void ppc_exc_min_prolog_sync_tmpl_e500_mchk(void);
 extern void ppc_exc_min_prolog_async_tmpl_e500_mchk(void);
+extern void ppc_exc_min_prolog_tmpl_naked(void);
 
 /* Special prologue for handling register shadowing on 603-style CPUs */
 extern void ppc_exc_tgpr_clr_prolog(void);
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c
index d4a5022fc3..05bd58d1c2 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c
@@ -10,20 +10,10 @@
  *  $Id$
  */
 
-#include	<stdint.h>
-#include	<string.h>
+#include <rtems.h>
+#include <rtems/score/apiext.h>
 
-#include	<rtems.h>
-#include	<rtems/score/cpu.h>
-#include	<libcpu/raw_exception.h>
-#include	<libcpu/spr.h>
-#include	<rtems/score/apiext.h>
-
-#include	"vectors.h"
-#include	"ppc_exc_bspsupp.h"
-
-/* offset into min-prolog where vector # is hardcoded */
-#define		PPC_EXC_PROLOG_VEC_OFFSET	2
+#include <bsp/vectors.h>
 
 /* Provide temp. storage space for a few registers.
  * This is used by the assembly code prior to setting up
@@ -39,9 +29,9 @@ uint32_t ppc_exc_lock_std  = 0;
 uint32_t ppc_exc_lock_crit = 0;
 uint32_t ppc_exc_lock_mchk = 0;
 
-uint32_t ppc_exc_vector_register_std     = 0;
-uint32_t ppc_exc_vector_register_crit    = 0;
-uint32_t ppc_exc_vector_register_mchk    = 0;
+uint32_t ppc_exc_vector_register_std  = 0;
+uint32_t ppc_exc_vector_register_crit = 0;
+uint32_t ppc_exc_vector_register_mchk = 0;
 
 /* MSR bits to enable once critical status info is saved and the stack
  * is switched; must be set depending on CPU type
@@ -49,105 +39,65 @@ uint32_t ppc_exc_vector_register_mchk    = 0;
  * Default is set here for classic PPC CPUs with a MMU
  * but is overridden from vectors_init.c
  */
-uint32_t ppc_exc_msr_bits     = MSR_IR | MSR_DR | MSR_RI;
+uint32_t ppc_exc_msr_bits = MSR_IR | MSR_DR | MSR_RI;
 
-int ppc_exc_handler_default( BSP_Exception_frame *f, unsigned int vector)
+static int ppc_exc_handler_default(BSP_Exception_frame *f, unsigned int vector)
 {
-	return 1;
+  return -1;
 }
 
 /* Table of C-handlers */
 ppc_exc_handler_t ppc_exc_handler_table [LAST_VALID_EXC + 1] = {
-	[0 ... LAST_VALID_EXC] = ppc_exc_handler_default
+  [0 ... LAST_VALID_EXC] = ppc_exc_handler_default
 };
 
-ppc_exc_handler_t ppc_exc_get_handler( unsigned vector)
-{
-	ppc_exc_handler_t handler = NULL;
-	if (vector > LAST_VALID_EXC) {
-		return 0;
-	}
-	if (ppc_exc_handler_table [vector] != ppc_exc_handler_default) {
-		handler = ppc_exc_handler_table [vector];
-	}
-	return handler;
-}
-
-int ppc_exc_set_handler( unsigned vector, ppc_exc_handler_t handler)
-{
-	if (vector > LAST_VALID_EXC) {
-		return -1;
-	}
-	if (handler == NULL) {
-		ppc_exc_handler_table [vector] = ppc_exc_handler_default;
-	} else {
-		ppc_exc_handler_table [vector] = handler;
-	}
-	return 0;
-}
-
-void
-ppc_exc_wrapup( BSP_Exception_frame *f)
+ppc_exc_handler_t ppc_exc_get_handler(unsigned vector)
 {
-	/* dispatch_disable level is decremented from assembly code.  */
-	if ( _Context_Switch_necessary ) {
-		/* FIXME: I believe it should be OK to re-enable
-		 *        interrupts around the execution of _Thread_Dispatch();
-		 */
-		_Thread_Dispatch();
-	} else if ( _ISR_Signals_to_thread_executing ) {
-		_ISR_Signals_to_thread_executing = 0;
-		/*
-		 * Process pending signals that have not already been
-		 * processed by _Thread_Dispatch. This happens quite
-		 * unfrequently : the ISR must have posted an action
-		 * to the current running thread.
-		 */
-		if ( _Thread_Do_post_task_switch_extension ||
-				_Thread_Executing->do_post_task_switch_extension ) {
-			_Thread_Executing->do_post_task_switch_extension = false;
-			_API_extensions_Run_postswitch();
-		}
-	}
+  if (
+    vector <= LAST_VALID_EXC
+      && ppc_exc_handler_table [vector] != ppc_exc_handler_default
+  ) {
+    return ppc_exc_handler_table [vector];
+  } else {
+    return NULL;
+  }
 }
 
-void
-ppc_exc_min_prolog_expand(ppc_exc_min_prolog_t buf, ppc_exc_min_prolog_template_t templ, uint16_t vec)
+rtems_status_code ppc_exc_set_handler(unsigned vector, ppc_exc_handler_t handler)
 {
-	memcpy(&buf[0], templ, sizeof(ppc_exc_min_prolog_t));
-	/* fixup the vector */
-	buf[PPC_EXC_PROLOG_VEC_OFFSET] = (buf[PPC_EXC_PROLOG_VEC_OFFSET] & 0xffff8000) | (vec & 0x7fff);
+  if (vector <= LAST_VALID_EXC) {
+    if (handler == NULL) {
+      ppc_exc_handler_table [vector] = ppc_exc_handler_default;
+    } else {
+      ppc_exc_handler_table [vector] = handler;
+    }
+
+    return RTEMS_SUCCESSFUL;
+  } else {
+    return RTEMS_INVALID_ID;
+  }
 }
 
-#undef TESTING
-#ifdef TESTING
-
-static void noop(const struct __rtems_raw_except_connect_data__*x) {}
-
-rtems_raw_except_connect_data exc_conn = {
-	exceptIndex: ASM_SYS_VECTOR,
-	hdl        : {
-					vector: ASM_SYS_VECTOR,
-					raw_hdl: 0,
-					raw_hdl_size: 0
-	             },
-	on         : noop,
-	off        : noop,
-	isOn       : 0	/* never used AFAIK */
-};
-
-void
-ppc_exc_raise()
-{
-	asm volatile("li 3, 0xffffdead; sc");
-}
-
-
-int
-exc_conn_do()
+void ppc_exc_wrapup(BSP_Exception_frame *frame)
 {
-	exc_conn.hdl.raw_hdl      = ppc_exc_min_prolog_auto;
-	exc_conn.hdl.raw_hdl_size = 16;
-	return ppc_set_exception(&exc_conn);
+  /* dispatch_disable level is decremented from assembly code.  */
+  if ( _Context_Switch_necessary ) {
+    /* FIXME: I believe it should be OK to re-enable
+     *        interrupts around the execution of _Thread_Dispatch();
+     */
+    _Thread_Dispatch();
+  } else if ( _ISR_Signals_to_thread_executing ) {
+    _ISR_Signals_to_thread_executing = 0;
+    /*
+     * Process pending signals that have not already been
+     * processed by _Thread_Dispatch. This happens quite
+     * unfrequently : the ISR must have posted an action
+     * to the current running thread.
+     */
+    if ( _Thread_Do_post_task_switch_extension ||
+        _Thread_Executing->do_post_task_switch_extension ) {
+      _Thread_Executing->do_post_task_switch_extension = false;
+      _API_extensions_Run_postswitch();
+    }
+  }
 }
-#endif
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
index eb60413232..63fd206f70 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
@@ -1,21 +1,147 @@
-/*
- * vectors.h Exception frame related contant and API.
+/**
+ * @file
  *
- *  This include file describe the data structure and the functions implemented
- *  by rtems to handle exceptions.
+ * @ingroup ppc_exc
+ * @ingroup ppc_exc_frame
  *
- *  CopyRight (C) 1999 valette@crf.canon.fr
+ * @brief PowerPC Exceptions API.
+ */
+
+/*                                                               
+ * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)        
+ *                    Canon Centre Recherche France.             
  *
- *  The license and distribution terms for this file may be
- *  found in found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
+ * Copyright (C) 2007 Till Straumann <strauman@slac.stanford.edu>
+ *                                                               
+ * Copyright (C) 2009 embedded brains GmbH.                      
+ *                                                               
+ * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>           
+ * to support 603, 603e, 604, 604e exceptions                    
+ *                                                               
+ * Moved to "libcpu/powerpc/new-exceptions" and consolidated     
+ * by Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>       
+ * to be common for all PPCs with new exceptions.                
+ *                                                               
+ * Derived from file "libcpu/powerpc/new-exceptions/raw_exception.h".
+ * Derived from file "libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h".
+ *                                                                   
+ * The license and distribution terms for this file may be           
+ * found in found in the file LICENSE in this distribution or at     
+ * http://www.rtems.com/license/LICENSE.                             
+ *                                                                   
+ * $Id$        
+ */
+
+/* DO NOT INTRODUCE #ifdef <cpu_flavor> in this file */
+
+#ifndef LIBCPU_VECTORS_H
+#define LIBCPU_VECTORS_H
+
+#include <libcpu/powerpc-utility.h>
+
+/**
+ * @defgroup ppc_exc PowerPC Exceptions
+ *
+ * @brief XXX
  *
- *  $Id$
+ * @{
+ */
+
+#define ASM_RESET_VECTOR                     0x01
+#define ASM_MACH_VECTOR                      0x02
+#define ASM_PROT_VECTOR                      0x03
+#define ASM_ISI_VECTOR                       0x04
+#define ASM_EXT_VECTOR                       0x05
+#define ASM_ALIGN_VECTOR                     0x06
+#define ASM_PROG_VECTOR                      0x07
+#define ASM_FLOAT_VECTOR                     0x08
+#define ASM_DEC_VECTOR                       0x09
+#define ASM_SYS_VECTOR                       0x0C
+#define ASM_TRACE_VECTOR                     0x0D
+
+#define ASM_BOOKE_CRIT_VECTOR                0x01
+/* We could use the std. decrementer vector # on bookE, too,
+ * but the bookE decrementer has slightly different semantics
+ * so we use a different vector (which happens to be
+ * the PIT vector on the 405 which is like the booke decrementer)
  */
-#ifndef LIBCPU_POWERPC_BSPSUPP_VECTORS_H
-#define LIBCPU_POWERPC_BSPSUPP_VECTORS_H
+#define ASM_BOOKE_DEC_VECTOR                 0x10
+#define ASM_BOOKE_ITLBMISS_VECTOR            0x11
+#define ASM_BOOKE_DTLBMISS_VECTOR            0x12
+#define ASM_BOOKE_FIT_VECTOR                 0x13
+#define ASM_BOOKE_WDOG_VECTOR                0x14
+
+#define ASM_PPC405_APU_UNAVAIL_VECTOR        ASM_60X_VEC_ASSIST_VECTOR
 
-#include <libcpu/raw_exception.h>
+#define ASM_8XX_FLOATASSIST_VECTOR           0x0E
+#define ASM_8XX_SOFTEMUL_VECTOR              0x10
+#define ASM_8XX_ITLBMISS_VECTOR              0x11
+#define ASM_8XX_DTLBMISS_VECTOR              0x12
+#define ASM_8XX_ITLBERROR_VECTOR             0x13
+#define ASM_8XX_DTLBERROR_VECTOR             0x14
+#define ASM_8XX_DBREAK_VECTOR                0x1C
+#define ASM_8XX_IBREAK_VECTOR                0x1D
+#define ASM_8XX_PERIFBREAK_VECTOR            0x1E
+#define ASM_8XX_DEVPORT_VECTOR               0x1F
+
+#define ASM_5XX_FLOATASSIST_VECTOR           0x0E
+#define ASM_5XX_SOFTEMUL_VECTOR              0x10
+#define ASM_5XX_IPROT_VECTOR                 0x13
+#define ASM_5XX_DPROT_VECTOR                 0x14
+#define ASM_5XX_DBREAK_VECTOR                0x1C
+#define ASM_5XX_IBREAK_VECTOR                0x1D
+#define ASM_5XX_MEBREAK_VECTOR               0x1E
+#define ASM_5XX_NMEBREAK_VECTOR              0x1F
+
+#define ASM_60X_VEC_VECTOR                   0x0A
+#define ASM_60X_PERFMON_VECTOR               0x0F
+#define ASM_60X_IMISS_VECTOR                 0x10
+#define ASM_60X_DLMISS_VECTOR                0x11
+#define ASM_60X_DSMISS_VECTOR                0x12
+#define ASM_60X_ADDR_VECTOR                  0x13
+#define ASM_60X_SYSMGMT_VECTOR               0x14
+#define ASM_60X_VEC_ASSIST_VECTOR            0x16
+#define ASM_60X_ITM_VECTOR                   0x17
+
+/* e200 */
+#define ASM_E200_SPE_UNAVAILABLE_VECTOR      0x15
+#define ASM_E200_SPE_DATA_VECTOR             0x16
+#define ASM_E200_SPE_ROUND_VECTOR            0x17
+
+/* e300 */
+#define ASM_E300_CRIT_VECTOR                 0x0A
+#define ASM_E300_PERFMON_VECTOR              0x0F
+#define ASM_E300_IMISS_VECTOR                ASM_60X_IMISS_VECTOR  /* Special case: Shadowed GPRs */
+#define ASM_E300_DLMISS_VECTOR               ASM_60X_DLMISS_VECTOR /* Special case: Shadowed GPRs */
+#define ASM_E300_DSMISS_VECTOR               ASM_60X_DSMISS_VECTOR /* Special case: Shadowed GPRs */
+#define ASM_E300_ADDR_VECTOR                 0x13
+#define ASM_E300_SYSMGMT_VECTOR              0x14
+
+/*
+ * If you change that number make sure to adjust the wrapper code in ppc_exc.S
+ * and that ppc_exc_handler_table will be correctly initialized.
+ */
+#define LAST_VALID_EXC                       0x1F
+
+/* DO NOT USE -- this symbol is DEPRECATED
+ * (only used by libbsp/shared/vectors/vectors.S
+ * which should not be used by new BSPs).
+ */
+#define ASM_60X_VEC_VECTOR_OFFSET            0xf20
+
+#define ASM_PPC405_FIT_VECTOR_OFFSET         0x1010
+#define ASM_PPC405_WDOG_VECTOR_OFFSET        0x1020
+#define ASM_PPC405_TRACE_VECTOR_OFFSET       0x2000
+
+/** @} */
+
+/**
+ * @defgroup ppc_exc_frame PowerPC Exception Frame
+ *
+ * @brief XXX
+ *
+ * @{
+ */
 
 /*
  * The callee (high level exception code written in C)
@@ -73,85 +199,291 @@
  */
 #define EXCEPTION_FRAME_END 176
 
+/** @} */
+
 #ifndef ASM
 
-#include <stdint.h>
+/**
+ * @ingroup ppc_exc_frame
+ *
+ * @{
+ */
+
+typedef struct {
+  unsigned EXC_SRR0;
+  unsigned EXC_SRR1;
+  unsigned _EXC_number;
+  unsigned GPR0;
+  unsigned GPR1;
+  unsigned GPR2;
+  unsigned GPR3;
+  unsigned GPR4;
+  unsigned GPR5;
+  unsigned GPR6;
+  unsigned GPR7;
+  unsigned GPR8;
+  unsigned GPR9;
+  unsigned GPR10;
+  unsigned GPR11;
+  unsigned GPR12;
+  unsigned GPR13;
+  unsigned GPR14;
+  unsigned GPR15;
+  unsigned GPR16;
+  unsigned GPR17;
+  unsigned GPR18;
+  unsigned GPR19;
+  unsigned GPR20;
+  unsigned GPR21;
+  unsigned GPR22;
+  unsigned GPR23;
+  unsigned GPR24;
+  unsigned GPR25;
+  unsigned GPR26;
+  unsigned GPR27;
+  unsigned GPR28;
+  unsigned GPR29;
+  unsigned GPR30;
+  unsigned GPR31;
+  unsigned EXC_CR;
+  unsigned EXC_CTR;
+  unsigned EXC_XER;
+  unsigned EXC_LR;
+  unsigned EXC_MSR;
+  unsigned EXC_DAR;
+} BSP_Exception_frame;
+
+/** @} */
+
+/**
+ * @ingroup ppc_exc
+ *
+ * @{
+ */
+
+/**
+ * @brief Global exception handler type.
+ */
+typedef void (*exception_handler_t)(BSP_Exception_frame*);
+
+/**
+ * @brief Global exception handler.
+ */
+extern exception_handler_t globalExceptHdl;
+
+/**
+ * @brief Default global exception handler.
+ */
+void C_exception_handler(BSP_Exception_frame* excPtr);
+
+void BSP_printStackTrace(BSP_Exception_frame *excPtr);
+
+/**
+ * @brief Exception categories.
+ *
+ * Exceptions of different categories use different SRR registers to save the
+ * machine state and do different things in the prologue and epilogue.
+ *
+ * For now, the CPU descriptions assume this fits into 8 bits.
+ */
+typedef enum {
+  PPC_EXC_INVALID = 0,
+  PPC_EXC_ASYNC = 1,
+  PPC_EXC_CLASSIC = 2,
+  PPC_EXC_CLASSIC_ASYNC = PPC_EXC_CLASSIC | PPC_EXC_ASYNC,
+  PPC_EXC_405_CRITICAL = 4,
+  PPC_EXC_405_CRITICAL_ASYNC = PPC_EXC_405_CRITICAL | PPC_EXC_ASYNC,
+  PPC_EXC_BOOKE_CRITICAL = 6,
+  PPC_EXC_BOOKE_CRITICAL_ASYNC = PPC_EXC_BOOKE_CRITICAL | PPC_EXC_ASYNC,
+  PPC_EXC_E500_MACHCHK  = 8,
+  PPC_EXC_E500_MACHCHK_ASYNC = PPC_EXC_E500_MACHCHK | PPC_EXC_ASYNC,
+  PPC_EXC_NAKED = 10
+} ppc_exc_category;
+
+/**
+ * @brief Categorie set type.
+ */
+typedef uint8_t ppc_exc_categories [LAST_VALID_EXC + 1];
+
+static inline bool ppc_exc_is_valid_category(ppc_exc_category category)
+{
+  return (unsigned) category <= (unsigned) PPC_EXC_NAKED;
+}
+
+/**
+ * @brief Indicates if exception entry table resides in a writable memory.
+ *
+ * This variable is initialized to 'TRUE' by default;
+ * BSPs which have their vectors in ROM should set it
+ * to FALSE prior to initializing raw exceptions.
+ *
+ * I suspect the only candidate is the simulator.
+ * After all, the value of this variable is used to
+ * determine where to install the prologue code and
+ * installing to ROM on anyting that's real ROM
+ * will fail anyways.
+ *
+ * This should probably go away... (T.S. 2007/11/30)
+ */
+extern bool bsp_exceptions_in_RAM;
+
+/**
+ * @brief Vector base address for CPUs (for example e200 and e500) with IVPR
+ * and IVOR registers.
+ */
+extern uint32_t ppc_exc_vector_base;
+
+/**
+ * @brief Returns the entry address of the vector @a vector.
+ */
+void *ppc_exc_vector_address(unsigned vector);
+
+/**
+ * @brief Returns the category set for a CPU of type @a cpu, or @c NULL if
+ * there is no category set available for this CPU.
+ */
+const ppc_exc_categories *ppc_exc_categories_for_cpu(ppc_cpu_id_t cpu);
+
+/**
+ * @brief Returns the category set for the current CPU, or @c NULL if there is
+ * no category set available for this CPU.
+ */
+static inline const ppc_exc_categories *ppc_exc_current_categories(void)
+{
+  return ppc_exc_categories_for_cpu(ppc_cpu_current());
+}
 
-/* codemove is like memmove, but it also gets the cache line size
- * as 4th parameter to synchronize them. If this last parameter is
- * zero, it performs more or less like memmove. No copy is performed if
- * source and destination addresses are equal. However the caches
- * are synchronized. Note that the size is always rounded up to the
- * next mutiple of 4.
+/**
+ * @brief Returns the category for the vector @a vector using the category set
+ * @a categories.
  */
-extern void * codemove(void *, const void *, unsigned int, unsigned long);
-extern void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
-extern int  exception_always_enabled(const rtems_raw_except_connect_data* ptr);
+ppc_exc_category ppc_exc_category_for_vector(
+  const ppc_exc_categories *categories,
+  unsigned vector
+);
+
+/**
+ * @brief Makes a minimal prologue for the vector @a vector with the category
+ * @a category.
+ *
+ * The minimal prologue will be copied to @a prologue.  Not more than @a
+ * prologue_size bytes will be copied.  Returns the actual minimal prologue
+ * size in bytes in @a prologue_size.
+ *
+ * @retval RTEMS_SUCCESSFUL Minimal prologue successfully made.
+ * @retval RTEMS_INVALID_ID Invalid vector number.
+ * @retval RTEMS_INVALID_NUMBER Invalid category.
+ * @retval RTEMS_INVALID_SIZE Prologue size to small.
+ */
+rtems_status_code ppc_exc_make_prologue(
+  unsigned vector,
+  ppc_exc_category category,
+  uint32_t *prologue,
+  size_t *prologue_size
+);
 
-void ppc_exc_initialize(
+/**
+ * @brief Initializes the exception handling.
+ *
+ * @retval RTEMS_SUCCESSFUL Successful initialization.
+ * @retval RTEMS_NOT_IMPLEMENTED No category set available for the current CPU.
+ * @retval RTEMS_NOT_CONFIGURED Register r13 does not point to the small data
+ * area anchor required by SVR4/EABI.
+ * @retval RTEMS_INTERNAL_ERROR Minimal prologue creation failed.
+ */
+rtems_status_code ppc_exc_initialize(
   uint32_t interrupt_disable_mask,
-  uint32_t interrupt_stack_start,
-  uint32_t interrupt_stack_size
+  uintptr_t interrupt_stack_begin,
+  uintptr_t interrupt_stack_size
 );
 
-typedef struct _BSP_Exception_frame {
-  unsigned 	EXC_SRR0;
-  unsigned 	EXC_SRR1;
-  unsigned	_EXC_number;
-  unsigned	GPR0;
-  unsigned	GPR1;
-  unsigned	GPR2;
-  unsigned	GPR3;
-  unsigned	GPR4;
-  unsigned	GPR5;
-  unsigned	GPR6;
-  unsigned	GPR7;
-  unsigned	GPR8;
-  unsigned	GPR9;
-  unsigned	GPR10;
-  unsigned	GPR11;
-  unsigned	GPR12;
-  unsigned	GPR13;
-  unsigned	GPR14;
-  unsigned	GPR15;
-  unsigned	GPR16;
-  unsigned	GPR17;
-  unsigned	GPR18;
-  unsigned	GPR19;
-  unsigned	GPR20;
-  unsigned	GPR21;
-  unsigned	GPR22;
-  unsigned	GPR23;
-  unsigned	GPR24;
-  unsigned	GPR25;
-  unsigned	GPR26;
-  unsigned	GPR27;
-  unsigned	GPR28;
-  unsigned	GPR29;
-  unsigned	GPR30;
-  unsigned	GPR31;
-  unsigned 	EXC_CR;
-  unsigned 	EXC_CTR;
-  unsigned 	EXC_XER;
-  unsigned	EXC_LR;
-  unsigned 	EXC_MSR;
-  unsigned	EXC_DAR;
-} BSP_Exception_frame;
+/**
+ * @brief High-level exception handler type.
+ *
+ * Exception handlers should return zero if the exception was handled and
+ * normal execution may resume.
+ *
+ * They should return minus one to reject the exception resulting in the
+ * globalExcHdl() being called.
+ *
+ * Other return values are reserved.
+ */
+typedef int (*ppc_exc_handler_t)(BSP_Exception_frame *f, unsigned vector);
+
+/**
+ * @brief Bits for MSR update.
+ *
+ * Bits in MSR that are enabled during execution of exception handlers / ISRs 
+ * (on classic PPC these are DR/IR/RI [default], on bookE-style CPUs they should
+ * be set to 0 during initialization)
+ *
+ * By default, the setting of these bits that is in effect when exception
+ * handling is initialized is used.
+ */
+extern uint32_t ppc_exc_msr_bits;
+
+/**
+ * @brief Cache write back check flag.
+ *
+ * (See README under CAVEATS). During initialization
+ * a check is performed to assert that write-back
+ * caching is enabled for memory accesses. If a BSP
+ * runs entirely without any caching then it should
+ * set this variable to zero prior to initializing
+ * exceptions in order to skip the test.
+ * NOTE: The code does NOT support mapping memory
+ *       with cache-attributes other than write-back
+ *       (unless the entire cache is physically disabled)
+ */
+extern uint32_t ppc_exc_cache_wb_check;
+
+/**
+ * @brief Set high-level exception handler.
+ *
+ * Hook C exception handlers.
+ *  - handlers for asynchronous exceptions run on the ISR stack
+ *    with thread-dispatching disabled.
+ *  - handlers for synchronous exceptions run on the task stack
+ *    with thread-dispatching enabled.
+ *
+ * If a particular slot is NULL then the traditional 'globalExcHdl' is used.
+ *
+ * ppc_exc_set_handler() registers a handler (returning 0 on success,
+ * -1 if the vector argument is too big).
+ *
+ * It is legal to set a NULL handler. This leads to the globalExcHdl
+ * being called if an exception for 'vector' occurs.
+ */
+rtems_status_code ppc_exc_set_handler(unsigned vector, ppc_exc_handler_t hdl);
+
+/**
+ * @brief Returns the currently active high-level exception handler.
+ */
+ppc_exc_handler_t ppc_exc_get_handler(unsigned vector);
+
+/**
+ * @brief Function for DAR access.
+ *
+ * CPU support may store the address of a function here
+ * that can be used by the default exception handler to
+ * obtain fault-address info which is helpful. Unfortunately,
+ * the SPR holding this information is not uniform
+ * across PPC families so we need assistance from
+ * CPU support
+ */
+extern uint32_t (*ppc_exc_get_DAR)(void);
+
+void
+ppc_exc_wrapup(BSP_Exception_frame *f);
+
+/** @} */
 
-typedef void (*exception_handler_t) (BSP_Exception_frame* excPtr);
-extern exception_handler_t globalExceptHdl;
 /*
  * Compatibility with pc386
  */
 typedef BSP_Exception_frame CPU_Exception_frame;
 typedef exception_handler_t cpuExcHandlerType;
 
-/*
- * dummy functions for exception interface
- */
-void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
-int exception_always_enabled(const rtems_raw_except_connect_data* ptr);
-
 #endif /* ASM */
 
-#endif /* LIBCPU_POWERPC_BSPSUPP_VECTORS_H */
+#endif /* LIBCPU_VECTORS_H */
diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
index 6a93a660cf..afd282acdb 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
@@ -51,9 +51,7 @@
 #include <bsp.h>
 
 #ifdef BSP_PPC403_CLOCK_HOOK_EXCEPTION
-#include <libcpu/raw_exception.h>
 #include <bsp/vectors.h>
-#include <bsp/ppc_exc_bspsupp.h>
 #define PPC_HAS_CLASSIC_EXCEPTIONS FALSE
 #else
 #if !defined(ppc405)
diff --git a/c/src/lib/libcpu/powerpc/preinstall.am b/c/src/lib/libcpu/powerpc/preinstall.am
index 0207fc3c96..d885f0b9fc 100644
--- a/c/src/lib/libcpu/powerpc/preinstall.am
+++ b/c/src/lib/libcpu/powerpc/preinstall.am
@@ -49,10 +49,15 @@ $(PROJECT_INCLUDE)/libcpu/powerpc-utility.h: shared/include/powerpc-utility.h $(
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/powerpc-utility.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/powerpc-utility.h
 
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
 if !mpc5xx
-$(PROJECT_INCLUDE)/libcpu/raw_exception.h: new-exceptions/raw_exception.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/raw_exception.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/raw_exception.h
+$(PROJECT_INCLUDE)/bsp/vectors.h: new-exceptions/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
 endif
 if shared
 $(PROJECT_INCLUDE)/libcpu/io.h: shared/include/io.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
@@ -210,19 +215,6 @@ $(PROJECT_INCLUDE)/mpc8260/mmu.h: mpc8260/include/mmu.h $(PROJECT_INCLUDE)/mpc82
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8260/mmu.h
 endif
 if mpc83xx
-$(PROJECT_INCLUDE)/bsp/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
-	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-
-$(PROJECT_INCLUDE)/bsp/vectors.h: new-exceptions/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: new-exceptions/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
 $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp):
 	@$(MKDIR_P) $(PROJECT_INCLUDE)/mpc83xx
 	@: > $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
@@ -249,23 +241,6 @@ $(PROJECT_INCLUDE)/mpc83xx/gtm.h: mpc83xx/include/gtm.h $(PROJECT_INCLUDE)/mpc83
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/gtm.h
 endif
 if mpc55xx
-$(PROJECT_INCLUDE)/bsp/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
-	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-
-$(PROJECT_INCLUDE)/bsp/vectors.h: new-exceptions/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: new-exceptions/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
-
-$(PROJECT_INCLUDE)/bsp/irq.h: mpc55xx/include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
-
 $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp):
 	@$(MKDIR_P) $(PROJECT_INCLUDE)/mpc55xx
 	@: > $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
@@ -302,4 +277,8 @@ PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/esci.h
 $(PROJECT_INCLUDE)/mpc55xx/watchdog.h: mpc55xx/include/watchdog.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/watchdog.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/watchdog.h
+
+$(PROJECT_INCLUDE)/bsp/irq.h: mpc55xx/include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
 endif
diff --git a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
index 2d3ce95d00..346e66997b 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
+++ b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
@@ -106,17 +106,28 @@ _PPC_FEAT_DECL(has_epic)
 _PPC_FEAT_DECL(has_shadowed_gprs)
 _PPC_FEAT_DECL(has_ivpr_and_ivor)
 
+#undef _PPC_FEAT_DECL
+
+static inline ppc_cpu_id_t ppc_cpu_current(void)
+{
+	return current_ppc_cpu;
+}
+
 static inline bool ppc_cpu_is_e300()
 {
-	if (current_ppc_cpu == PPC_UNKNOWN) {
+	if (ppc_cpu_current() == PPC_UNKNOWN) {
 		get_ppc_cpu_type();
 	}
-	return current_ppc_cpu == PPC_e300c1
-		|| current_ppc_cpu == PPC_e300c2
-		|| current_ppc_cpu == PPC_e300c3;
+	return ppc_cpu_current() == PPC_e300c1
+		|| ppc_cpu_current() == PPC_e300c2
+		|| ppc_cpu_current() == PPC_e300c3;
+}
+
+static inline bool ppc_cpu_is(ppc_cpu_id_t cpu)
+{
+	return ppc_cpu_current() == cpu;
 }
 
-#undef _PPC_FEAT_DECL
 #endif /* ASM */
 
 #endif
diff --git a/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h b/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
index 6f540cfea0..ca615060fa 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
+++ b/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
@@ -29,165 +29,182 @@
 #ifndef LIBCPU_POWERPC_UTILITY_H
 #define LIBCPU_POWERPC_UTILITY_H
 
+#ifndef ASM
+  #include <rtems.h>
+#endif
+
+#include <rtems/score/cpu.h>
 #include <rtems/powerpc/registers.h>
+#include <rtems/powerpc/powerpc.h>
 
 #ifndef ASM
 
-#include <stdint.h>
-
 #include <rtems/bspIo.h>
 #include <rtems/system.h>
-#include <rtems/score/cpu.h>
 
 #include <libcpu/cpuIdent.h>
 
-#define LINKER_SYMBOL( sym) extern char sym []
+#define LINKER_SYMBOL(sym) extern char sym []
 
 /**
  * @brief Read one byte from @a src.
  */
-static inline uint8_t ppc_read_byte( const volatile void *src)
+static inline uint8_t ppc_read_byte(const volatile void *src)
 {
-	uint8_t value;
+  uint8_t value;
 
-	asm volatile (
-		"lbz %0, 0(%1)"
-		: "=r" (value)
-		: "b" (src)
-	);
+  asm volatile (
+    "lbz %0, 0(%1)"
+    : "=r" (value)
+    : "b" (src)
+  );
 
-	return value;
+  return value;
 }
 
 /**
  * @brief Read one half word from @a src.
  */
-static inline uint16_t ppc_read_half_word( const volatile void *src)
+static inline uint16_t ppc_read_half_word(const volatile void *src)
 {
-	uint16_t value;
+  uint16_t value;
 
-	asm volatile (
-		"lhz %0, 0(%1)"
-		: "=r" (value)
-		: "b" (src)
-	);
+  asm volatile (
+    "lhz %0, 0(%1)"
+    : "=r" (value)
+    : "b" (src)
+  );
 
-	return value;
+  return value;
 }
 
 /**
  * @brief Read one word from @a src.
  */
-static inline uint32_t ppc_read_word( const volatile void *src)
+static inline uint32_t ppc_read_word(const volatile void *src)
 {
-	uint32_t value;
+  uint32_t value;
 
-	asm volatile (
-		"lwz %0, 0(%1)"
-		: "=r" (value)
-		: "b" (src)
-	);
+  asm volatile (
+    "lwz %0, 0(%1)"
+    : "=r" (value)
+    : "b" (src)
+  );
 
-	return value;
+  return value;
 }
 
 /**
  * @brief Write one byte @a value to @a dest.
  */
-static inline void ppc_write_byte( uint8_t value, volatile void *dest)
+static inline void ppc_write_byte(uint8_t value, volatile void *dest)
 {
-	asm volatile (
-		"stb %0, 0(%1)"
-		:
-		: "r" (value), "b" (dest)
-	);
+  asm volatile (
+    "stb %0, 0(%1)"
+    :
+    : "r" (value), "b" (dest)
+  );
 }
 
 /**
  * @brief Write one half word @a value to @a dest.
  */
-static inline void ppc_write_half_word( uint16_t value, volatile void *dest)
+static inline void ppc_write_half_word(uint16_t value, volatile void *dest)
 {
-	asm volatile (
-		"sth %0, 0(%1)"
-		:
-		: "r" (value), "b" (dest)
-	);
+  asm volatile (
+    "sth %0, 0(%1)"
+    :
+    : "r" (value), "b" (dest)
+  );
 }
 
 /**
  * @brief Write one word @a value to @a dest.
  */
-static inline void ppc_write_word( uint32_t value, volatile void *dest)
+static inline void ppc_write_word(uint32_t value, volatile void *dest)
 {
-	asm volatile (
-		"stw %0, 0(%1)" :
-		: "r" (value), "b" (dest)
-	);
+  asm volatile (
+    "stw %0, 0(%1)" :
+    : "r" (value), "b" (dest)
+  );
 }
 
 
-static inline void *ppc_stack_pointer()
+static inline void *ppc_stack_pointer(void)
 {
-	void *sp;
+  void *sp;
 
-	asm volatile (
-		"mr %0, 1"
-		: "=r" (sp)
-	);
+  asm volatile (
+    "mr %0, 1"
+    : "=r" (sp)
+  );
 
-	return sp;
+  return sp;
 }
 
-static inline void ppc_set_stack_pointer( void *sp)
+static inline void ppc_set_stack_pointer(void *sp)
 {
-	asm volatile (
-		"mr 1, %0"
-		:
-		: "r" (sp)
-	);
+  asm volatile (
+    "mr 1, %0"
+    :
+    : "r" (sp)
+  );
 }
 
-static inline void *ppc_link_register()
+static inline void *ppc_link_register(void)
 {
-	void *lr;
+  void *lr;
+
+  asm volatile (
+    "mflr %0"
+    : "=r" (lr)
+  );
 
-	asm volatile (
-		"mflr %0"
-		: "=r" (lr)
-	);
+  return lr;
+}
 
-	return lr;
+static inline void ppc_set_link_register(void *lr)
+{
+  asm volatile (
+    "mtlr %0"
+    :
+    : "r" (lr)
+  );
 }
 
-static inline void ppc_set_link_register( void *lr)
+static inline uint32_t ppc_machine_state_register(void)
 {
-	asm volatile (
-		"mtlr %0"
-		:
-		: "r" (lr)
-	);
+  uint32_t msr;
+
+  asm volatile (
+    "mfmsr %0"
+    : "=r" (msr)
+  );
+
+  return msr;
 }
 
-static inline uint32_t ppc_machine_state_register()
+static inline void ppc_set_machine_state_register(uint32_t msr)
 {
-	uint32_t msr;
+  asm volatile (
+    "mtmsr %0"
+    :
+    : "r" (msr)
+  );
+}
 
-	asm volatile (
-		"mfmsr %0"
-		: "=r" (msr)
-	);
+static inline void ppc_synchronize_data(void)
+{
+  RTEMS_COMPILER_MEMORY_BARRIER();
 
-	return msr;
+  asm volatile ("sync");
 }
 
-static inline void ppc_set_machine_state_register( uint32_t msr)
+static inline void ppc_synchronize_instructions(void)
 {
-	asm volatile (
-		"mtmsr %0"
-		:
-		: "r" (msr)
-	);
+  RTEMS_COMPILER_MEMORY_BARRIER();
+
+  asm volatile ("isync");
 }
 
 /**
@@ -196,21 +213,21 @@ static inline void ppc_set_machine_state_register( uint32_t msr)
  * You can use this function to enable the external exceptions and restore the
  * machine state with ppc_external_exceptions_disable() later.
  */
-static inline uint32_t ppc_external_exceptions_enable()
+static inline uint32_t ppc_external_exceptions_enable(void)
 {
-	uint32_t current_msr;
-	uint32_t new_msr;
+  uint32_t current_msr;
+  uint32_t new_msr;
 
-	RTEMS_COMPILER_MEMORY_BARRIER();
+  RTEMS_COMPILER_MEMORY_BARRIER();
 
-	asm volatile (
-		"mfmsr %0;"
-		"ori %1, %0, 0x8000;"
-		"mtmsr %1"
-		: "=r" (current_msr), "=r" (new_msr)
-	);
+  asm volatile (
+    "mfmsr %0;"
+    "ori %1, %0, 0x8000;"
+    "mtmsr %1"
+    : "=r" (current_msr), "=r" (new_msr)
+  );
 
-	return current_msr;
+  return current_msr;
 }
 
 /**
@@ -218,59 +235,59 @@ static inline uint32_t ppc_external_exceptions_enable()
  * 
  * @see ppc_external_exceptions_enable()
  */
-static inline void ppc_external_exceptions_disable( uint32_t msr)
+static inline void ppc_external_exceptions_disable(uint32_t msr)
 {
-	ppc_set_machine_state_register( msr);
+  ppc_set_machine_state_register(msr);
 
-	RTEMS_COMPILER_MEMORY_BARRIER();
+  RTEMS_COMPILER_MEMORY_BARRIER();
 }
 
-static inline uint32_t ppc_decrementer_register()
+static inline uint32_t ppc_decrementer_register(void)
 {
-	uint32_t dec;
+  uint32_t dec;
 
-	PPC_Get_decrementer( dec);
+  PPC_Get_decrementer(dec);
 
-	return dec;
+  return dec;
 }
 
-static inline void ppc_set_decrementer_register( uint32_t dec)
+static inline void ppc_set_decrementer_register(uint32_t dec)
 {
-	PPC_Set_decrementer( dec);
+  PPC_Set_decrementer(dec);
 }
 
 /**
  * @brief Preprocessor magic for stringification of @a x.
  */
-#define PPC_STRINGOF( x) #x
+#define PPC_STRINGOF(x) #x
 
 /**
  * @brief Returns the value of the Special Purpose Register with number @a spr.
  *
  * @note This macro uses a GNU C extension.
  */
-#define PPC_SPECIAL_PURPOSE_REGISTER( spr) \
-	( { \
-		uint32_t val; \
-		asm volatile ( \
-			"mfspr %0, " PPC_STRINGOF( spr) \
-			: "=r" (val) \
-		); \
-		val;\
-	} )
+#define PPC_SPECIAL_PURPOSE_REGISTER(spr) \
+  ({ \
+    uint32_t val; \
+    asm volatile (\
+      "mfspr %0, " PPC_STRINGOF(spr) \
+      : "=r" (val) \
+    ); \
+    val;\
+  } )
 
 /**
  * @brief Sets the Special Purpose Register with number @a spr to the value in
  * @a val.
  */
-#define PPC_SET_SPECIAL_PURPOSE_REGISTER( spr, val) \
-	do { \
-		asm volatile ( \
-			"mtspr " PPC_STRINGOF( spr) ", %0" \
-			: \
-			: "r" (val) \
-		); \
-	} while (0)
+#define PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val) \
+  do { \
+    asm volatile (\
+      "mtspr " PPC_STRINGOF(spr) ", %0" \
+      : \
+      : "r" (val) \
+    ); \
+  } while (0)
 
 /**
  * @brief Sets in the Special Purpose Register with number @a spr all bits
@@ -278,17 +295,17 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * Interrupts are disabled throughout this operation.
  */
-#define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS( spr, bits) \
-	do { \
-		rtems_interrupt_level level; \
-		uint32_t val; \
-		uint32_t mybits = bits; \
-		rtems_interrupt_disable( level); \
-		val = PPC_SPECIAL_PURPOSE_REGISTER( spr); \
-		val |= mybits; \
-		PPC_SET_SPECIAL_PURPOSE_REGISTER( spr, val); \
-		rtems_interrupt_enable( level); \
-	} while (0)
+#define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS(spr, bits) \
+  do { \
+    rtems_interrupt_level level; \
+    uint32_t val; \
+    uint32_t mybits = bits; \
+    rtems_interrupt_disable(level); \
+    val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \
+    val |= mybits; \
+    PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
+    rtems_interrupt_enable(level); \
+  } while (0)
 
 /**
  * @brief Sets in the Special Purpose Register with number @a spr all bits
@@ -297,19 +314,19 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * Interrupts are disabled throughout this operation.
  */
-#define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS_MASKED( spr, bits, mask) \
-	do { \
-		rtems_interrupt_level level; \
-		uint32_t val; \
-		uint32_t mybits = bits; \
-		uint32_t mymask = mask; \
-		rtems_interrupt_disable( level); \
-		val = PPC_SPECIAL_PURPOSE_REGISTER( spr); \
-		val &= ~mymask; \
-		val |= mybits; \
-		PPC_SET_SPECIAL_PURPOSE_REGISTER( spr, val); \
-		rtems_interrupt_enable( level); \
-	} while (0)
+#define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS_MASKED(spr, bits, mask) \
+  do { \
+    rtems_interrupt_level level; \
+    uint32_t val; \
+    uint32_t mybits = bits; \
+    uint32_t mymask = mask; \
+    rtems_interrupt_disable(level); \
+    val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \
+    val &= ~mymask; \
+    val |= mybits; \
+    PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
+    rtems_interrupt_enable(level); \
+  } while (0)
 
 /**
  * @brief Clears in the Special Purpose Register with number @a spr all bits
@@ -317,17 +334,17 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * Interrupts are disabled throughout this operation.
  */
-#define PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( spr, bits) \
-	do { \
-		rtems_interrupt_level level; \
-		uint32_t val; \
-		uint32_t mybits = bits; \
-		rtems_interrupt_disable( level); \
-		val = PPC_SPECIAL_PURPOSE_REGISTER( spr); \
-		val &= ~mybits; \
-		PPC_SET_SPECIAL_PURPOSE_REGISTER( spr, val); \
-		rtems_interrupt_enable( level); \
-	} while (0)
+#define PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS(spr, bits) \
+  do { \
+    rtems_interrupt_level level; \
+    uint32_t val; \
+    uint32_t mybits = bits; \
+    rtems_interrupt_disable(level); \
+    val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \
+    val &= ~mybits; \
+    PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
+    rtems_interrupt_enable(level); \
+  } while (0)
 
 /**
  * @brief Returns the value of the Device Control Register with number @a dcr.
@@ -336,15 +353,15 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * @note This macro uses a GNU C extension.
  */
-#define PPC_DEVICE_CONTROL_REGISTER( dcr) \
-	( { \
-		uint32_t val; \
-		asm volatile ( \
-			"mfdcr %0, " PPC_STRINGOF( dcr) \
-			: "=r" (val) \
-		); \
-		val;\
-	} )
+#define PPC_DEVICE_CONTROL_REGISTER(dcr) \
+  ({ \
+    uint32_t val; \
+    asm volatile (\
+      "mfdcr %0, " PPC_STRINGOF(dcr) \
+      : "=r" (val) \
+    ); \
+    val;\
+  } )
 
 /**
  * @brief Sets the Device Control Register with number @a dcr to the value in
@@ -352,14 +369,14 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * The PowerPC 4XX family has Device Control Registers.
  */
-#define PPC_SET_DEVICE_CONTROL_REGISTER( dcr, val) \
-	do { \
-		asm volatile ( \
-			"mtdcr " PPC_STRINGOF( dcr) ", %0" \
-			: \
-			: "r" (val) \
-		); \
-	} while (0)
+#define PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val) \
+  do { \
+    asm volatile (\
+      "mtdcr " PPC_STRINGOF(dcr) ", %0" \
+      : \
+      : "r" (val) \
+    ); \
+  } while (0)
 
 /**
  * @brief Sets in the Device Control Register with number @a dcr all bits
@@ -367,17 +384,17 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * Interrupts are disabled throughout this operation.
  */
-#define PPC_SET_DEVICE_CONTROL_REGISTER_BITS( dcr, bits) \
-	do { \
-		rtems_interrupt_level level; \
-		uint32_t val; \
-		uint32_t mybits = bits; \
-		rtems_interrupt_disable( level); \
-		val = PPC_DEVICE_CONTROL_REGISTER( dcr); \
-		val |= mybits; \
-		PPC_SET_DEVICE_CONTROL_REGISTER( dcr, val); \
-		rtems_interrupt_enable( level); \
-	} while (0)
+#define PPC_SET_DEVICE_CONTROL_REGISTER_BITS(dcr, bits) \
+  do { \
+    rtems_interrupt_level level; \
+    uint32_t val; \
+    uint32_t mybits = bits; \
+    rtems_interrupt_disable(level); \
+    val = PPC_DEVICE_CONTROL_REGISTER(dcr); \
+    val |= mybits; \
+    PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \
+    rtems_interrupt_enable(level); \
+  } while (0)
 
 /**
  * @brief Sets in the Device Control Register with number @a dcr all bits
@@ -386,19 +403,19 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * Interrupts are disabled throughout this operation.
  */
-#define PPC_SET_DEVICE_CONTROL_REGISTER_BITS_MASKED( dcr, bits, mask) \
-	do { \
-		rtems_interrupt_level level; \
-		uint32_t val; \
-		uint32_t mybits = bits; \
-		uint32_t mymask = mask; \
-		rtems_interrupt_disable( level); \
-		val = PPC_DEVICE_CONTROL_REGISTER( dcr); \
-		val &= ~mymask; \
-		val |= mybits; \
-		PPC_SET_DEVICE_CONTROL_REGISTER( dcr, val); \
-		rtems_interrupt_enable( level); \
-	} while (0)
+#define PPC_SET_DEVICE_CONTROL_REGISTER_BITS_MASKED(dcr, bits, mask) \
+  do { \
+    rtems_interrupt_level level; \
+    uint32_t val; \
+    uint32_t mybits = bits; \
+    uint32_t mymask = mask; \
+    rtems_interrupt_disable(level); \
+    val = PPC_DEVICE_CONTROL_REGISTER(dcr); \
+    val &= ~mymask; \
+    val |= mybits; \
+    PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \
+    rtems_interrupt_enable(level); \
+  } while (0)
 
 /**
  * @brief Clears in the Device Control Register with number @a dcr all bits
@@ -406,52 +423,54 @@ static inline void ppc_set_decrementer_register( uint32_t dec)
  *
  * Interrupts are disabled throughout this operation.
  */
-#define PPC_CLEAR_DEVICE_CONTROL_REGISTER_BITS( dcr, bits) \
-	do { \
-		rtems_interrupt_level level; \
-		uint32_t val; \
-		uint32_t mybits = bits; \
-		rtems_interrupt_disable( level); \
-		val = PPC_DEVICE_CONTROL_REGISTER( dcr); \
-		val &= ~mybits; \
-		PPC_SET_DEVICE_CONTROL_REGISTER( dcr, val); \
-		rtems_interrupt_enable( level); \
-	} while (0)
-
-static inline uint32_t ppc_time_base()
+#define PPC_CLEAR_DEVICE_CONTROL_REGISTER_BITS(dcr, bits) \
+  do { \
+    rtems_interrupt_level level; \
+    uint32_t val; \
+    uint32_t mybits = bits; \
+    rtems_interrupt_disable(level); \
+    val = PPC_DEVICE_CONTROL_REGISTER(dcr); \
+    val &= ~mybits; \
+    PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \
+    rtems_interrupt_enable(level); \
+  } while (0)
+
+static inline uint32_t ppc_time_base(void)
 {
-	uint32_t val;
+  uint32_t val;
 
-	CPU_Get_timebase_low( val);
+  CPU_Get_timebase_low(val);
 
-	return val;
+  return val;
 }
 
-static inline void ppc_set_time_base( uint32_t val)
+static inline void ppc_set_time_base(uint32_t val)
 {
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( TBWL, val);
+  PPC_SET_SPECIAL_PURPOSE_REGISTER(TBWL, val);
 }
 
-static inline uint32_t ppc_time_base_upper()
+static inline uint32_t ppc_time_base_upper(void)
 {
-	return PPC_SPECIAL_PURPOSE_REGISTER( TBRU);
+  return PPC_SPECIAL_PURPOSE_REGISTER(TBRU);
 }
 
-static inline void ppc_set_time_base_upper( uint32_t val)
+static inline void ppc_set_time_base_upper(uint32_t val)
 {
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( TBWU, val);
+  PPC_SET_SPECIAL_PURPOSE_REGISTER(TBWU, val);
 }
 
-static inline uint64_t ppc_time_base_64()
+static inline uint64_t ppc_time_base_64(void)
 {
-	return PPC_Get_timebase_register();
+  return PPC_Get_timebase_register();
 }
 
-static inline void ppc_set_time_base_64( uint64_t val)
+static inline void ppc_set_time_base_64(uint64_t val)
 {
-	PPC_Set_timebase_register( val);
+  PPC_Set_timebase_register(val);
 }
 
+void ppc_code_copy(void *dest, const void *src, size_t n);
+
 #else /* ASM */
 
 #include <rtems/asm.h>
@@ -523,7 +542,7 @@ static inline void ppc_set_time_base_64( uint64_t val)
 	mtmsr	\level
 .endm
 
-#define LINKER_SYMBOL( sym) .extern sym
+#define LINKER_SYMBOL(sym) .extern sym
 
 #endif /* ASM */
author	Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>	2009-10-23 07:32:46 +0000
committer	Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>	2009-10-23 07:32:46 +0000
commit	2d2de4eba16374ea05fc7ee9cd257ad0d4ebf2ca (patch)
tree	45161e8d9a9d0a9c483b84d915085c0230b09ea0 /c/src/lib
parent	2009-10-23 Ralf Corsépius <ralf.corsepius@rtems.org> (diff)
download	rtems-2d2de4eba16374ea05fc7ee9cd257ad0d4ebf2ca.tar.bz2