summaryrefslogtreecommitdiffstats
path: root/c/src/lib
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-01-11 17:34:20 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-01-11 17:34:20 +0000
commit0dd1d44582dd2b39a791aa60f76358ff9bba8cd8 (patch)
tree6be7a7b7d21975f08ba16993958e4bca5177dc76 /c/src/lib
parentPatch from Emmanuel Raguet <raguet@crf.canon.fr> to correct macro (diff)
downloadrtems-0dd1d44582dd2b39a791aa60f76358ff9bba8cd8.tar.bz2
Removed old hack of using Configuration Table entry ticks_per_timeslice
being set to 0 to indicate that there should be no Clock Tick. This was used by the Timing Tests to avoid clock tick overhead perturbing execution times. Now the Timing Tests simply leave the Clock Tick Driver out of the Device Driver Table.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/i386/pc386/clock/ckinit.c12
-rw-r--r--c/src/lib/libbsp/i960/cvme961/clock/ckinit.c20
-rw-r--r--c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c19
-rw-r--r--c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c50
-rw-r--r--c/src/lib/libbsp/m68k/efi332/clock/ckinit.c31
-rw-r--r--c/src/lib/libbsp/m68k/efi68k/clock/ckinit.c23
-rw-r--r--c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c25
-rw-r--r--c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c49
-rw-r--r--c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c78
-rw-r--r--c/src/lib/libbsp/m68k/idp/clock/ckinit.c65
-rw-r--r--c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c49
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c23
-rw-r--r--c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c27
-rw-r--r--c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c38
-rw-r--r--c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c24
-rw-r--r--c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c20
-rw-r--r--c/src/lib/libbsp/powerpc/dmv177/clock/clock.c15
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c15
-rw-r--r--c/src/lib/libbsp/powerpc/psim/clock/clock.c16
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/clock/clock.c15
-rw-r--r--c/src/lib/libbsp/sparc/erc32/clock/ckinit.c43
-rw-r--r--c/src/lib/libcpu/hppa1.1/clock/clock.c30
-rw-r--r--c/src/lib/libcpu/mips/clock/ckinit.c24
-rw-r--r--c/src/lib/libcpu/mips64orion/clock/ckinit.c24
-rw-r--r--c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c14
-rw-r--r--c/src/lib/libcpu/powerpc/mpc821/clock/clock.c46
-rw-r--r--c/src/lib/libcpu/powerpc/mpc860/clock/clock.c42
-rw-r--r--c/src/lib/libcpu/powerpc/ppc403/clock/clock.c50
-rw-r--r--c/src/lib/libcpu/sh/sh7032/clock/ckinit.c90
-rw-r--r--c/src/lib/libcpu/sh/sh7045/clock/ckinit.c93
30 files changed, 450 insertions, 620 deletions
diff --git a/c/src/lib/libbsp/i386/pc386/clock/ckinit.c b/c/src/lib/libbsp/i386/pc386/clock/ckinit.c
index b4151911fb..09563c7785 100644
--- a/c/src/lib/libbsp/i386/pc386/clock/ckinit.c
+++ b/c/src/lib/libbsp/i386/pc386/clock/ckinit.c
@@ -103,13 +103,10 @@ static void clockIsr()
+--------------------------------------------------------------------------*/
void clockOff(const rtems_irq_connect_data* unused)
{
- if (BSP_Configuration.ticks_per_timeslice)
- {
- /* reset timer mode to standard (BIOS) value */
- outport_byte(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN);
- outport_byte(TIMER_CNTR0, 0);
- outport_byte(TIMER_CNTR0, 0);
- }
+ /* reset timer mode to standard (BIOS) value */
+ outport_byte(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN);
+ outport_byte(TIMER_CNTR0, 0);
+ outport_byte(TIMER_CNTR0, 0);
} /* Clock_exit */
@@ -158,7 +155,6 @@ static void clockOn(const rtems_irq_connect_data* unused)
Clock_isrs = Clock_isrs_per_tick; /* Initialize Clock_isrs */
- if (BSP_Configuration.ticks_per_timeslice)
{
/* 105/88 approximates TIMER_TICK * 1e-6 */
rtems_unsigned32 count = US_TO_TICK(microseconds_per_isr);
diff --git a/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c b/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c
index 5850f5f04e..19d2df4077 100644
--- a/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c
+++ b/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c
@@ -51,24 +51,20 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = set_vector( clock_isr, CLOCK_VECTOR, 1 );
- victimer = (volatile unsigned char *) 0xa00000c3;
- *victimer = 0x12;
- *victimer = 0x92; /* 1000 HZ */
- }
+ Old_ticker = set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ victimer = (volatile unsigned char *) 0xa00000c3;
+ *victimer = 0x12;
+ *victimer = 0x92; /* 1000 HZ */
}
void Clock_exit()
{
unsigned char *victimer;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- victimer = (unsigned char *) 0xa00000c3;
- *victimer = 0x12;
- i960_mask_intr( 5 );
- /* do not restore old vector */
- }
+ victimer = (unsigned char *) 0xa00000c3;
+ *victimer = 0x12;
+ i960_mask_intr( 5 );
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c b/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c
index aebdb162b3..20b7ea3144 100644
--- a/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c
+++ b/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c
@@ -65,12 +65,6 @@ void Install_clock(
Reload_Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
Clock_isrs = Reload_Clock_isrs;
-/* Not for our case
- if ( BSP_Configuration.ticks_per_timeslice ) {
- *icon = 0x6000;
-
- Old_ticker = set_vector( (((unsigned int) clock_isr) | 0x2), CLOCK_VECTOR, 1 );
-*/
#define BUS_CLOCK_1 0
#define TMR_WRITE_CNTL 8
#define TMR_AUTO_RELOAD 4
@@ -78,9 +72,6 @@ void Install_clock(
#define TMR_TERM_CNT_STAT 1
Old_ticker = set_vector( (((unsigned int) clock_isr) | 0x2), CLOCK_VECTOR, 1 );
-/*
- *(unsigned int *)(CLOCK_VECTOR >>2) = (unsigned int )clockHandler;
-*/
/* initialize the i960RP timer 0 here */
@@ -102,13 +93,11 @@ void Clock_exit()
{
volatile unsigned int *tmr0 = (unsigned int *) TMR0_ADDR;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- /* shut down the timer */
- *tmr0 = *tmr0 & ~TMR_ENABLE;
+ /* shut down the timer */
+ *tmr0 = *tmr0 & ~TMR_ENABLE;
- i960_mask_intr( 12 );
- /* do not restore old vector */
- }
+ i960_mask_intr( 12 );
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c
index 0fdd8c5352..3d83c739f5 100644
--- a/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c
@@ -69,44 +69,38 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
-
- Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 );
- Z8x36_READ ( TIMER, MASTER_INTR, data );
- Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) );
- Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 );
- Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE );
- Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 );
- Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, CLOCK_VECTOR );
- Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 );
- Z8x36_READ ( TIMER, MASTER_INTR, data );
- Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+
+ Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 );
+ Z8x36_READ ( TIMER, MASTER_INTR, data );
+ Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) );
+ Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 );
+ Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE );
+ Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 );
+ Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, CLOCK_VECTOR );
+ Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 );
+ Z8x36_READ ( TIMER, MASTER_INTR, data );
+ Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 );
- /*
- * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6
- */
+ /*
+ * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6
+ */
- data = (*(rtems_unsigned8 *)0x0D00000B);
- (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60;
+ data = (*(rtems_unsigned8 *)0x0D00000B);
+ (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60;
- Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 );
+ Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 );
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
void Clock_exit( void )
{
rtems_unsigned8 data;
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- Z8x36_READ ( TIMER, MASTER_INTR, data );
- Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) );
- /* do not restore old vector */
-
- }
+ Z8x36_READ ( TIMER, MASTER_INTR, data );
+ Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) );
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/efi332/clock/ckinit.c b/c/src/lib/libbsp/m68k/efi332/clock/ckinit.c
index fbef7982f1..6aa051895b 100644
--- a/c/src/lib/libbsp/m68k/efi332/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/efi332/clock/ckinit.c
@@ -57,31 +57,24 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- /* enable 1mS interrupts */
- *PITR = (unsigned short int)( SAM(0x09,0,PITM) );/* load counter */
- *PICR = (unsigned short int) /* enable interrupt */
- ( SAM(ISRL_PIT,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
-
- atexit( Clock_exit );
- }
+ /* enable 1mS interrupts */
+ *PITR = (unsigned short int)( SAM(0x09,0,PITM) );/* load counter */
+ *PICR = (unsigned short int) /* enable interrupt */
+ ( SAM(ISRL_PIT,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
+
+ atexit( Clock_exit );
}
void Clock_exit( void )
{
+ /* shutdown the periodic interrupt */
+ *PICR = (unsigned short int)
+ ( SAM(0,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
+ /* ^^ zero disables interrupt */
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- /* shutdown the periodic interrupt */
- *PICR = (unsigned short int)
- ( SAM(0,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
- /* ^^ zero disables interrupt */
-
- /* do not restore old vector */
-
- }
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/efi68k/clock/ckinit.c b/c/src/lib/libbsp/m68k/efi68k/clock/ckinit.c
index 2426f57d0d..28a4976376 100644
--- a/c/src/lib/libbsp/m68k/efi68k/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/efi68k/clock/ckinit.c
@@ -82,27 +82,20 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- *MSR = RS; /* enable 1mS interrupts */
- *ICR0 |= OME;
+ *MSR = RS; /* enable 1mS interrupts */
+ *ICR0 |= OME;
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
void Clock_exit( void )
{
-
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- /* shutdown periodic interrupt */
- *MSR = RS;
- *ICR0 &= 0xc0;
- /* do not restore old vector */
-
- }
+ /* shutdown periodic interrupt */
+ *MSR = RS;
+ *ICR0 &= 0xc0;
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c
index 9d6dc19390..3df157d1f3 100644
--- a/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c
@@ -83,30 +83,25 @@ void Install_clock(
rtems_isr_entry clock_isr
)
{
-
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ set_vector( clock_isr, CLOCK_VECTOR, 1 );
- m302.reg.trr1 = TRR1_VAL; /* set timer reference register */
- m302.reg.tmr1 = TMR1_VAL; /* set timer mode register & enable */
- /*
- * Enable TIMER1 interrupts only.
- */
- m302.reg.imr = RBIT_IMR_TIMER1; /* set 68302 int-mask to allow ints */
+ m302.reg.trr1 = TRR1_VAL; /* set timer reference register */
+ m302.reg.tmr1 = TMR1_VAL; /* set timer mode register & enable */
+ /*
+ * Enable TIMER1 interrupts only.
+ */
+ m302.reg.imr = RBIT_IMR_TIMER1; /* set 68302 int-mask to allow ints */
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
- /* TODO: figure out what to do here */
- /* do not restore old vector */
- }
+ /* TODO: figure out what to do here */
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c
index 85acdd3ea6..b4373d48b7 100644
--- a/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c
@@ -77,12 +77,10 @@ Clock_isr (rtems_vector_number vector)
void
Clock_exit (void)
{
- if (BSP_Configuration.ticks_per_timeslice ) {
- /*
- * Turn off periodic interval timer
- */
- SIMPITR = 0;
- }
+ /*
+ * Turn off periodic interval timer
+ */
+ SIMPITR = 0;
}
/******************************************************
@@ -96,34 +94,33 @@ static void
Install_clock (rtems_isr_entry clock_isr)
{
unsigned32 pitr_tmp;
+ unsigned32 usecs_per_tick;
Clock_driver_ticks = 0;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- set_vector (clock_isr, CLOCK_VECTOR, 1);
+ set_vector (clock_isr, CLOCK_VECTOR, 1);
- /* sets the Periodic Interrupt Control Register PICR */
- /* voir a quoi correspond exactement le Clock Vector */
+ /* sets the Periodic Interrupt Control Register PICR */
+ /* voir a quoi correspond exactement le Clock Vector */
- SIMPICR = ( CLOCK_IRQ_LEVEL << 8 ) | ( CLOCK_VECTOR );
-
- /* sets the PITR count value */
- /* this assumes a 32.765 kHz crystal */
+ SIMPICR = ( CLOCK_IRQ_LEVEL << 8 ) | ( CLOCK_VECTOR );
+
+ /* sets the PITR count value */
+ /* this assumes a 32.765 kHz crystal */
- /* find out whether prescaler should be enabled or not */
- if ( BSP_Configuration.microseconds_per_tick <= 31128 ) {
- pitr_tmp = ( BSP_Configuration.microseconds_per_tick * 8192 ) / 1000000 ;
- }
- else {
- pitr_tmp = ( BSP_Configuration.microseconds_per_tick / 1000000 ) * 16;
- /* enable it */
- pitr_tmp |= 0x100;
- }
+ usecs_per_tick = BSP_Configuration.microseconds_per_tick;
+ /* find out whether prescaler should be enabled or not */
+ if ( usecs_per_tick <= 31128 ) {
+ pitr_tmp = ( usecs_per_tick * 8192 ) / 1000000 ;
+ } else {
+ pitr_tmp = ( usecs_per_tick / 1000000 ) * 16;
+ /* enable it */
+ pitr_tmp |= 0x100;
+ }
- SIMPITR = (unsigned char) pitr_tmp;
+ SIMPITR = (unsigned char) pitr_tmp;
- atexit (Clock_exit);
- }
+ atexit (Clock_exit);
}
/******************************************************
diff --git a/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c
index a2a50d5715..b7d2b296ae 100644
--- a/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c
@@ -101,54 +101,50 @@ Clock_isr (rtems_vector_number vector)
void
Clock_exit (void)
{
- if (BSP_Configuration.ticks_per_timeslice ) {
- /*
- * Turn off periodic interval timer
- */
- m360.pitr &= ~0xFF;
- }
+ /*
+ * Turn off periodic interval timer
+ */
+ m360.pitr &= ~0xFF;
}
static void
Install_clock (rtems_isr_entry clock_isr)
{
+ int divisor;
+ extern int m360_clock_rate; /* This should be somewhere in a config file */
+ unsigned long nsec_per_chip_tick = 1000000000 / m360_clock_rate;
+ unsigned long nsec_per_pit_tick = 512 * nsec_per_chip_tick;
+
Clock_driver_ticks = 0;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- /*
- * Choose periodic interval timer register value
- * The rate at which the periodic interval timer
- * can generate interrupts is almost certainly not
- * the same as desired by the BSP configuration.
- * Handle the difference by choosing the largest PIT
- * interval which is less than or equal to the RTEMS
- * interval and skipping some hardware interrupts.
- * To reduce the jitter in the calls to RTEMS the
- * hardware interrupt interval is never less than
- * the maximum non-prescaled value from the PIT.
- *
- * For a 25 MHz external clock the basic clock rate is
- * 40 nsec * 128 * 4 = 20.48 usec/tick
- */
- int divisor;
- extern int m360_clock_rate; /* This should be somewhere in a config file */
- unsigned long nsec_per_chip_tick = 1000000000 / m360_clock_rate;
- unsigned long nsec_per_pit_tick = 512 * nsec_per_chip_tick;
-
- rtems_nsec_per_tick = BSP_Configuration.microseconds_per_tick * 1000;
- divisor = rtems_nsec_per_tick / nsec_per_pit_tick;
- if (divisor >= 256) {
- divisor = 255;
- }
- else if (divisor == 0) {
- divisor = 1;
- }
- pit_nsec_per_tick = nsec_per_pit_tick * divisor;
- m360.pitr &= ~0x1FF;
- m360.picr = (CLOCK_IRQ_LEVEL << 8) | CLOCK_VECTOR;
- set_vector (clock_isr, CLOCK_VECTOR, 1);
- m360.pitr |= divisor;
- atexit (Clock_exit);
+ /*
+ * Choose periodic interval timer register value
+ * The rate at which the periodic interval timer
+ * can generate interrupts is almost certainly not
+ * the same as desired by the BSP configuration.
+ * Handle the difference by choosing the largest PIT
+ * interval which is less than or equal to the RTEMS
+ * interval and skipping some hardware interrupts.
+ * To reduce the jitter in the calls to RTEMS the
+ * hardware interrupt interval is never less than
+ * the maximum non-prescaled value from the PIT.
+ *
+ * For a 25 MHz external clock the basic clock rate is
+ * 40 nsec * 128 * 4 = 20.48 usec/tick
+ */
+
+ rtems_nsec_per_tick = BSP_Configuration.microseconds_per_tick * 1000;
+ divisor = rtems_nsec_per_tick / nsec_per_pit_tick;
+ if (divisor >= 256) {
+ divisor = 255;
+ } else if (divisor == 0) {
+ divisor = 1;
}
+ pit_nsec_per_tick = nsec_per_pit_tick * divisor;
+ m360.pitr &= ~0x1FF;
+ m360.picr = (CLOCK_IRQ_LEVEL << 8) | CLOCK_VECTOR;
+ set_vector (clock_isr, CLOCK_VECTOR, 1);
+ m360.pitr |= divisor;
+ atexit (Clock_exit);
}
rtems_device_driver
diff --git a/c/src/lib/libbsp/m68k/idp/clock/ckinit.c b/c/src/lib/libbsp/m68k/idp/clock/ckinit.c
index f8a517ed48..ab56f8a981 100644
--- a/c/src/lib/libbsp/m68k/idp/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/idp/clock/ckinit.c
@@ -96,37 +96,35 @@ rtems_isr_entry clock_isr;
Clock_driver_ticks = 0;
Clock_isrs = (int)(Configuration.microseconds_per_tick / 1000);
- if ( Configuration.ticks_per_timeslice ) {
/* led_putnum('c'); * for debugging purposes */
Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- /* Disable timer for initialization */
- MC68230_WRITE (TCR, 0x00);
-
- /* some PI/T initialization stuff here -- see comment in the ckisr.c
- file in this directory to understand why I use the values that I do */
- /* Set up the interrupt vector on the MC68230 chip:
- TIVR = CLOCK_VECTOR; */
- MC68230_WRITE (TIVR, CLOCK_VECTOR);
-
- /* Set CPRH through CPRL to 193 (not 203) decimal for countdown--see ckisr.c
- CPRH = 0x00;
- CPRM = 0x00;
- CPRL = 0xC1; */
- MC68230_WRITE (CPRH, 0x00);
- MC68230_WRITE (CPRM, 0x00);
- MC68230_WRITE (CPRL, 0xC1);
-
- /* Enable timer and use it as an external periodic interrupt generator
- TCR = 0xA1; */
+ /* Disable timer for initialization */
+ MC68230_WRITE (TCR, 0x00);
+
+ /* some PI/T initialization stuff here -- see comment in the ckisr.c
+ file in this directory to understand why I use the values that I do */
+ /* Set up the interrupt vector on the MC68230 chip:
+ TIVR = CLOCK_VECTOR; */
+ MC68230_WRITE (TIVR, CLOCK_VECTOR);
+
+ /* Set CPRH through CPRL to 193 (not 203) decimal for countdown--see ckisr.c
+ CPRH = 0x00;
+ CPRM = 0x00;
+ CPRL = 0xC1; */
+ MC68230_WRITE (CPRH, 0x00);
+ MC68230_WRITE (CPRM, 0x00);
+ MC68230_WRITE (CPRL, 0xC1);
+
+ /* Enable timer and use it as an external periodic interrupt generator
+ TCR = 0xA1; */
/* led_putnum('a'); * for debugging purposes */
- MC68230_WRITE (TCR, 0xA1);
+ MC68230_WRITE (TCR, 0xA1);
- /*
- * Schedule the clock cleanup routine to execute if the application exits.
- */
- atexit( Clock_exit );
- }
+ /*
+ * Schedule the clock cleanup routine to execute if the application exits.
+ */
+ atexit( Clock_exit );
}
/* The following was added for debugging purposes */
@@ -134,16 +132,13 @@ void Clock_exit( void )
{
rtems_unsigned8 data;
- if ( Configuration.ticks_per_timeslice ) {
-
- /* disable timer
- data = TCR;
- TCR = (data & 0xFE); */
- MC68230_READ (TCR, data);
- MC68230_WRITE (TCR, (data & 0xFE));
+ /* disable timer
+ data = TCR;
+ TCR = (data & 0xFE); */
+ MC68230_READ (TCR, data);
+ MC68230_WRITE (TCR, (data & 0xFE));
- /* do not restore old vector */
- }
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c
index 4c40716473..c315185f86 100644
--- a/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c
@@ -81,44 +81,39 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- timer = (struct z8036_map *) 0xfffb0000;
- timer->MASTER_INTR = MICRVAL;
- timer->CT1_MODE_SPEC = T1MSRVAL;
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ timer = (struct z8036_map *) 0xfffb0000;
+ timer->MASTER_INTR = MICRVAL;
+ timer->CT1_MODE_SPEC = T1MSRVAL;
- *((rtems_unsigned16 *)0xfffb0016) = MS_COUNT; /* write countdown value */
+ *((rtems_unsigned16 *)0xfffb0016) = MS_COUNT; /* write countdown value */
- /*
- * timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8);
- * timer->CT1_TIME_CONST_LSB = (MS_COUNT & 0xff);
- */
+ /*
+ * timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8);
+ * timer->CT1_TIME_CONST_LSB = (MS_COUNT & 0xff);
+ */
- timer->MASTER_CFG = MCCRVAL;
- timer->CT1_CMD_STATUS = T1CSRVAL;
+ timer->MASTER_CFG = MCCRVAL;
+ timer->CT1_CMD_STATUS = T1CSRVAL;
- /*
- * Enable interrupt via VME interrupt mask register
- */
- (*(rtems_unsigned8 *)0xfffb0038) &= 0xfd;
-
- atexit( Clock_exit );
- }
+ /*
+ * Enable interrupt via VME interrupt mask register
+ */
+ (*(rtems_unsigned8 *)0xfffb0038) &= 0xfd;
+ atexit( Clock_exit );
}
void Clock_exit( void )
{
volatile struct z8036_map *timer;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- timer = (struct z8036_map *) 0xfffb0000;
- timer->MASTER_INTR = 0x62;
- timer->CT1_MODE_SPEC = 0x00;
- timer->MASTER_CFG = 0xf4;
- timer->CT1_CMD_STATUS = 0x00;
- /* do not restore old vector */
- }
+ timer = (struct z8036_map *) 0xfffb0000;
+ timer->MASTER_INTR = 0x62;
+ timer->CT1_MODE_SPEC = 0x00;
+ timer->MASTER_CFG = 0xf4;
+ timer->CT1_CMD_STATUS = 0x00;
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c
index d5104d1377..a679897b41 100644
--- a/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c
@@ -67,26 +67,21 @@ void Install_clock(rtems_isr_entry clock_isr )
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker =
- (rtems_isr_entry) set_vector( clock_isr, TIMER_2_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, TIMER_2_VECTOR, 1 );
- pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
- pcc->timer2_preload = MS_COUNT;
- /* write preload value */
- pcc->timer2_control = 0x07; /* clear T2 overflow counter, enable counter */
- pcc->timer2_int_control = CLOCK_INT_LEVEL|0x08;
- /* Enable Timer 2 and set its int. level */
+ pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
+ pcc->timer2_preload = MS_COUNT;
+ /* write preload value */
+ pcc->timer2_control = 0x07; /* clear T2 overflow counter, enable counter */
+ pcc->timer2_int_control = CLOCK_INT_LEVEL|0x08;
+ /* Enable Timer 2 and set its int. level */
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
- pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
- }
+ pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c
index dc91350612..7cde85513f 100644
--- a/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c
@@ -71,21 +71,18 @@ void Install_clock(rtems_isr_entry clock_isr )
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker =
- (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */
- lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */
- lcsr->timer_cmp_2 = MS_COUNT;
- lcsr->timer_cnt_2 = 0; /* clear counter */
- lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, and */
- /* clear-overflow-cnt */
-
- lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */
- lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */
-
- atexit( Clock_exit );
- }
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */
+ lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */
+ lcsr->timer_cmp_2 = MS_COUNT;
+ lcsr->timer_cnt_2 = 0; /* clear counter */
+ lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, and */
+ /* clear-overflow-cnt */
+
+ lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */
+ lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */
+
+ atexit( Clock_exit );
}
void Clock_exit( void )
diff --git a/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c
index 961376f3d6..021725d992 100644
--- a/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c
@@ -156,21 +156,19 @@ void VMEchip2_T2_initialize( void )
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- lcsr->intr_ena &= 0xFDFFFFFF; /* Disable tick timer 2 interrupt */
- lcsr->intr_clear = 0x02000000; /* Clear tick timer 2 interrupt */
- lcsr->intr_level[0] = /* Set tick timer 2 interrupt level */
- (lcsr->intr_level[0] & 0xFFFFFF0F ) | (CLOCK_INT_LEVEL << 4);
- lcsr->timer_cmp_2 = MS_COUNT; /* Period in compare register */
- lcsr->timer_cnt_2 = 0; /* Clear tick timer 2 counter */
- Old_ticker = /* Install C ISR */
- (rtems_isr_entry) set_vector( VMEchip2_T2_isr, CLOCK_VECTOR, 1 );
- lcsr->board_ctl |= 0x700; /* Start tick timer 2, reset-on-compare, */
- /* and clear tick timer 2 overflow counter */
- lcsr->intr_ena |= 0x02000000; /* Enable tick timer 2 interrupt */
- lcsr->vector_base |= 0x00800000;/* Unmask VMEchip2 interrupts */
- atexit( clock_exit ); /* Turn off T2 interrupts when we exit */
- }
+ lcsr->intr_ena &= 0xFDFFFFFF; /* Disable tick timer 2 interrupt */
+ lcsr->intr_clear = 0x02000000; /* Clear tick timer 2 interrupt */
+ lcsr->intr_level[0] = /* Set tick timer 2 interrupt level */
+ (lcsr->intr_level[0] & 0xFFFFFF0F ) | (CLOCK_INT_LEVEL << 4);
+ lcsr->timer_cmp_2 = MS_COUNT; /* Period in compare register */
+ lcsr->timer_cnt_2 = 0; /* Clear tick timer 2 counter */
+ Old_ticker = /* Install C ISR */
+ (rtems_isr_entry) set_vector( VMEchip2_T2_isr, CLOCK_VECTOR, 1 );
+ lcsr->board_ctl |= 0x700; /* Start tick timer 2, reset-on-compare, */
+ /* and clear tick timer 2 overflow counter */
+ lcsr->intr_ena |= 0x02000000; /* Enable tick timer 2 interrupt */
+ lcsr->vector_base |= 0x00800000;/* Unmask VMEchip2 interrupts */
+ atexit( clock_exit ); /* Turn off T2 interrupts when we exit */
}
@@ -189,13 +187,11 @@ void VMEchip2_T2_initialize( void )
*/
void clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
- lcsr->board_ctl &= 0xFFFFFEFF; /* Stop tick timer 2 */
- lcsr->intr_ena &= 0xFDFFFFFF; /* Disable tick timer 2 interrupt */
- lcsr->intr_clear = 0x02000000; /* Clear tick timer 2 interrupt */
+ lcsr->board_ctl &= 0xFFFFFEFF; /* Stop tick timer 2 */
+ lcsr->intr_ena &= 0xFDFFFFFF; /* Disable tick timer 2 interrupt */
+ lcsr->intr_clear = 0x02000000; /* Clear tick timer 2 interrupt */
- set_vector( Old_ticker, CLOCK_VECTOR, 1 );
- }
+ set_vector( Old_ticker, CLOCK_VECTOR, 1 );
}
diff --git a/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c b/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c
index 9d6dc19390..2a80c41d58 100644
--- a/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c
@@ -87,26 +87,22 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ set_vector( clock_isr, CLOCK_VECTOR, 1 );
- m302.reg.trr1 = TRR1_VAL; /* set timer reference register */
- m302.reg.tmr1 = TMR1_VAL; /* set timer mode register & enable */
- /*
- * Enable TIMER1 interrupts only.
- */
- m302.reg.imr = RBIT_IMR_TIMER1; /* set 68302 int-mask to allow ints */
+ m302.reg.trr1 = TRR1_VAL; /* set timer reference register */
+ m302.reg.tmr1 = TMR1_VAL; /* set timer mode register & enable */
+ /*
+ * Enable TIMER1 interrupts only.
+ */
+ m302.reg.imr = RBIT_IMR_TIMER1; /* set 68302 int-mask to allow ints */
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
- /* TODO: figure out what to do here */
- /* do not restore old vector */
- }
+ /* TODO: figure out what to do here */
+ /* do not restore old vector */
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c b/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c
index ea71004841..b38947cd6f 100644
--- a/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c
+++ b/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c
@@ -98,19 +98,12 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
/*
- * If ticks_per_timeslice is configured as non-zero, then the user
- * wants a clock tick.
+ * Hardware specific initialize goes here
*/
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- /*
- * Hardware specific initialize goes here
- */
-
- /* XXX */
- }
+ /* XXX */
/*
* Schedule the clock cleanup routine to execute if the application exits.
@@ -125,12 +118,9 @@ void Install_clock(
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- /* XXX: turn off the timer interrupts */
+ /* XXX: turn off the timer interrupts */
- /* XXX: If necessary, restore the old vector */
- }
+ /* XXX: If necessary, restore the old vector */
}
/*
diff --git a/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c b/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c
index 75490a3382..c874dff10b 100644
--- a/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c
+++ b/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c
@@ -119,13 +119,11 @@ void Install_clock(
{
Clock_driver_ticks = 0;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- PPC_Set_decrementer( Clock_Decrementer_value );
+ PPC_Set_decrementer( Clock_Decrementer_value );
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
/*PAGE
@@ -145,12 +143,9 @@ void Install_clock(
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- /* nothing to do */;
+ /* nothing to do */;
- /* do not restore old vector */
- }
+ /* do not restore old vector */
}
/*PAGE
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c b/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c
index 29ca97be32..7e08ed0ea4 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c
@@ -117,13 +117,11 @@ void Install_clock(
{
Clock_driver_ticks = 0;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- PPC_Set_decrementer( Clock_Decrementer_value );
+ PPC_Set_decrementer( Clock_Decrementer_value );
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
/*
@@ -142,12 +140,9 @@ void Install_clock(
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- /* nothing to do */;
+ /* nothing to do */;
- /* do not restore old vector */
- }
+ /* do not restore old vector */
}
/*
diff --git a/c/src/lib/libbsp/powerpc/psim/clock/clock.c b/c/src/lib/libbsp/powerpc/psim/clock/clock.c
index b0f9ee6f53..8ac1b2bd77 100644
--- a/c/src/lib/libbsp/powerpc/psim/clock/clock.c
+++ b/c/src/lib/libbsp/powerpc/psim/clock/clock.c
@@ -122,14 +122,11 @@ void Install_clock(
{
Clock_driver_ticks = 0;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- PPC_Set_decrementer( CPU_PPC_CLICKS_PER_TICK );
-
- atexit( Clock_exit );
- }
+ PPC_Set_decrementer( CPU_PPC_CLICKS_PER_TICK );
+ atexit( Clock_exit );
}
/*
@@ -148,12 +145,9 @@ void Install_clock(
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- /* nothing to do */;
+ /* nothing to do */;
- /* do not restore old vector */
- }
+ /* do not restore old vector */
}
/*
diff --git a/c/src/lib/libbsp/powerpc/score603e/clock/clock.c b/c/src/lib/libbsp/powerpc/score603e/clock/clock.c
index 76b328f217..dc7fcf8fc8 100644
--- a/c/src/lib/libbsp/powerpc/score603e/clock/clock.c
+++ b/c/src/lib/libbsp/powerpc/score603e/clock/clock.c
@@ -117,13 +117,11 @@ void Install_clock(
{
Clock_driver_ticks = 0;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- PPC_Set_decrementer( Clock_Decrementer_value );
+ PPC_Set_decrementer( Clock_Decrementer_value );
- atexit( Clock_exit );
- }
+ atexit( Clock_exit );
}
/*
@@ -142,12 +140,9 @@ void Install_clock(
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
-
- /* nothing to do */;
+ /* nothing to do */;
- /* do not restore old vector */
- }
+ /* do not restore old vector */
}
/*
diff --git a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
index 60444a7336..c18a8b5556 100644
--- a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
+++ b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
@@ -128,27 +128,24 @@ void Install_clock(
{
Clock_driver_ticks = 0;
- if ( BSP_Configuration.ticks_per_timeslice ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- /* approximately 1 us per countdown */
- ERC32_MEC.Real_Time_Clock_Scalar = CLOCK_SPEED - 1;
- ERC32_MEC.Real_Time_Clock_Counter = CPU_SPARC_CLICKS_PER_TICK;
+ /* approximately 1 us per countdown */
+ ERC32_MEC.Real_Time_Clock_Scalar = CLOCK_SPEED - 1;
+ ERC32_MEC.Real_Time_Clock_Counter = CPU_SPARC_CLICKS_PER_TICK;
- ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
- ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING |
- ERC32_MEC_TIMER_COUNTER_LOAD_SCALER |
- ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER
- );
+ ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
+ ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING |
+ ERC32_MEC_TIMER_COUNTER_LOAD_SCALER |
+ ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER
+ );
- ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
- ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING |
- ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO
- );
-
- atexit( Clock_exit );
- }
+ ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
+ ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING |
+ ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO
+ );
+ atexit( Clock_exit );
}
/*
@@ -167,15 +164,13 @@ void Install_clock(
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
- ERC32_Mask_interrupt( ERC32_INTERRUPT_REAL_TIME_CLOCK );
+ ERC32_Mask_interrupt( ERC32_INTERRUPT_REAL_TIME_CLOCK );
- ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
- ERC32_MEC_TIMER_COUNTER_DISABLE_COUNTING
- );
+ ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
+ ERC32_MEC_TIMER_COUNTER_DISABLE_COUNTING
+ );
- /* do not restore old vector */
- }
+ /* do not restore old vector */
}
/*
diff --git a/c/src/lib/libcpu/hppa1.1/clock/clock.c b/c/src/lib/libcpu/hppa1.1/clock/clock.c
index 256d5bc2ae..7bf177e3d6 100644
--- a/c/src/lib/libcpu/hppa1.1/clock/clock.c
+++ b/c/src/lib/libcpu/hppa1.1/clock/clock.c
@@ -101,20 +101,18 @@ void Install_clock(rtems_isr_entry clock_isr)
Clock_isrs = rtems_configuration_get_milliseconds_per_tick();
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /*
- * initialize the interval here
- * First tick is set to right amount of time in the future
- * Future ticks will be incremented over last value set
- * in order to provide consistent clicks in the face of
- * interrupt overhead
- */
-
- Clock_clicks_interrupt = Clock_read_itimer() + CPU_HPPA_CLICKS_PER_TICK;
- set_itimer((rtems_unsigned32) Clock_clicks_interrupt);
-
- (void) set_vector(clock_isr, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
- }
+ /*
+ * initialize the interval here
+ * First tick is set to right amount of time in the future
+ * Future ticks will be incremented over last value set
+ * in order to provide consistent clicks in the face of
+ * interrupt overhead
+ */
+
+ Clock_clicks_interrupt = Clock_read_itimer() + CPU_HPPA_CLICKS_PER_TICK;
+ set_itimer((rtems_unsigned32) Clock_clicks_interrupt);
+
+ (void) set_vector(clock_isr, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
atexit(Clock_exit);
}
@@ -186,9 +184,7 @@ Clock_isr(rtems_vector_number vector)
void
Clock_exit(void)
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- (void) set_vector(0, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
- }
+ (void) set_vector(0, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
}
/*
diff --git a/c/src/lib/libcpu/mips/clock/ckinit.c b/c/src/lib/libcpu/mips/clock/ckinit.c
index 4fda46ea0b..c6ae88f9e0 100644
--- a/c/src/lib/libcpu/mips/clock/ckinit.c
+++ b/c/src/lib/libcpu/mips/clock/ckinit.c
@@ -160,21 +160,15 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = rtems_configuration_get_milliseconds_per_tick();
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
/*
- * If ticks_per_timeslice is configured as non-zero, then the user
- * wants a clock tick.
+ * Hardware specific initialize goes here
*/
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- /*
- * Hardware specific initialize goes here
- */
-
- mips_timer_rate = rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
- mips_set_timer( mips_timer_rate );
- enable_int(CLOCK_VECTOR_MASK);
- }
+ mips_timer_rate =
+ rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
+ mips_set_timer( mips_timer_rate );
+ enable_int(CLOCK_VECTOR_MASK);
/*
* Schedule the clock cleanup routine to execute if the application exits.
@@ -189,10 +183,8 @@ void Install_clock(
void Clock_exit( void )
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* mips: turn off the timer interrupts */
- disable_int(~CLOCK_VECTOR_MASK);
- }
+ /* mips: turn off the timer interrupts */
+ disable_int(~CLOCK_VECTOR_MASK);
}
/*
diff --git a/c/src/lib/libcpu/mips64orion/clock/ckinit.c b/c/src/lib/libcpu/mips64orion/clock/ckinit.c
index 4fda46ea0b..c6ae88f9e0 100644
--- a/c/src/lib/libcpu/mips64orion/clock/ckinit.c
+++ b/c/src/lib/libcpu/mips64orion/clock/ckinit.c
@@ -160,21 +160,15 @@ void Install_clock(
Clock_driver_ticks = 0;
Clock_isrs = rtems_configuration_get_milliseconds_per_tick();
+ Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
/*
- * If ticks_per_timeslice is configured as non-zero, then the user
- * wants a clock tick.
+ * Hardware specific initialize goes here
*/
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
- /*
- * Hardware specific initialize goes here
- */
-
- mips_timer_rate = rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
- mips_set_timer( mips_timer_rate );
- enable_int(CLOCK_VECTOR_MASK);
- }
+ mips_timer_rate =
+ rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
+ mips_set_timer( mips_timer_rate );
+ enable_int(CLOCK_VECTOR_MASK);
/*
* Schedule the clock cleanup routine to execute if the application exits.
@@ -189,10 +183,8 @@ void Install_clock(
void Clock_exit( void )
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* mips: turn off the timer interrupts */
- disable_int(~CLOCK_VECTOR_MASK);
- }
+ /* mips: turn off the timer interrupts */
+ disable_int(~CLOCK_VECTOR_MASK);
}
/*
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c b/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
index 035af4d61d..988215fa26 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
@@ -48,12 +48,10 @@ rtems_device_minor_number rtems_clock_minor;
void clockOff(void* unused)
{
- if (BSP_Configuration.ticks_per_timeslice) {
- /*
- * Nothing to do as we cannot disable all interrupts and
- * the decrementer interrupt enable is MSR_EE
- */
- }
+ /*
+ * Nothing to do as we cannot disable all interrupts and
+ * the decrementer interrupt enable is MSR_EE
+ */
}
void clockOn(void* unused)
{
@@ -116,9 +114,7 @@ int clockIsOn(void* unused)
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
- (void) BSP_disconnect_clock_handler ();
- }
+ (void) BSP_disconnect_clock_handler ();
}
/*
diff --git a/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c b/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
index a0fe3a02d2..b380758970 100644
--- a/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
@@ -81,28 +81,26 @@ void Install_clock(rtems_isr_entry clock_isr)
if (pit_value > 0xffff) { /* pit is only 16 bits long */
rtems_fatal_error_occurred(-1);
}
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
-
- /*
- * initialize the interval here
- * First tick is set to right amount of time in the future
- * Future ticks will be incremented over last value set
- * in order to provide consistent clicks in the face of
- * interrupt overhead
- */
-
- rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
+
+ /*
+ * initialize the interval here
+ * First tick is set to right amount of time in the future
+ * Future ticks will be incremented over last value set
+ * in order to provide consistent clicks in the face of
+ * interrupt overhead
+ */
+
+ rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
- m821.sccr &= ~(1<<24);
- m821.pitc = pit_value;
+ m821.sccr &= ~(1<<24);
+ m821.pitc = pit_value;
- /* set PIT irq level, enable PIT, PIT interrupts */
- /* and clear int. status */
- m821.piscr = M821_PISCR_PIRQ(0) |
- M821_PISCR_PTE | M821_PISCR_PS | M821_PISCR_PIE;
+ /* set PIT irq level, enable PIT, PIT interrupts */
+ /* and clear int. status */
+ m821.piscr = M821_PISCR_PIRQ(0) |
+ M821_PISCR_PTE | M821_PISCR_PS | M821_PISCR_PIE;
- m821.simask |= M821_SIMASK_LVM0;
- }
+ m821.simask |= M821_SIMASK_LVM0;
atexit(Clock_exit);
}
@@ -127,12 +125,10 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
void
Clock_exit(void)
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* disable PIT and PIT interrupts */
- m821.piscr &= ~(M821_PISCR_PTE | M821_PISCR_PIE);
-
- (void) set_vector(0, PPC_IRQ_LVL0, 1);
- }
+ /* disable PIT and PIT interrupts */
+ m821.piscr &= ~(M821_PISCR_PTE | M821_PISCR_PIE);
+
+ (void) set_vector(0, PPC_IRQ_LVL0, 1);
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c b/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
index 25af11ce9a..73a586aa6a 100644
--- a/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
@@ -82,28 +82,26 @@ void Install_clock(rtems_isr_entry clock_isr)
if (pit_value > 0xffff) { /* pit is only 16 bits long */
rtems_fatal_error_occurred(-1);
}
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /*
- * initialize the interval here
- * First tick is set to right amount of time in the future
- * Future ticks will be incremented over last value set
- * in order to provide consistent clicks in the face of
- * interrupt overhead
- */
-
- rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
+ /*
+ * initialize the interval here
+ * First tick is set to right amount of time in the future
+ * Future ticks will be incremented over last value set
+ * in order to provide consistent clicks in the face of
+ * interrupt overhead
+ */
+
+ rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
- m860.sccr &= ~(1<<24);
- m860.pitc = pit_value;
+ m860.sccr &= ~(1<<24);
+ m860.pitc = pit_value;
- /* set PIT irq level, enable PIT, PIT interrupts */
- /* and clear int. status */
- m860.piscr = M860_PISCR_PIRQ(0) |
- M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE;
+ /* set PIT irq level, enable PIT, PIT interrupts */
+ /* and clear int. status */
+ m860.piscr = M860_PISCR_PIRQ(0) |
+ M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE;
- m860.simask |= M860_SIMASK_LVM0;
- }
+ m860.simask |= M860_SIMASK_LVM0;
atexit(Clock_exit);
}
@@ -128,12 +126,10 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
void
Clock_exit(void)
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* disable PIT and PIT interrupts */
- m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE);
+ /* disable PIT and PIT interrupts */
+ m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE);
- (void) set_vector(0, PPC_IRQ_LVL0, 1);
- }
+ (void) set_vector(0, PPC_IRQ_LVL0, 1);
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
index 44f07eff1f..d7e9514b5f 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
@@ -132,6 +132,7 @@ void Install_clock(rtems_isr_entry clock_isr)
{
rtems_isr_entry previous_isr;
rtems_unsigned32 pvr, iocr;
+ register rtems_unsigned32 tcr;
Clock_driver_ticks = 0;
@@ -164,31 +165,29 @@ void Install_clock(rtems_isr_entry clock_isr)
pit_value = rtems_configuration_get_microseconds_per_tick() *
rtems_cpu_configuration_get_clicks_per_usec();
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- register rtems_unsigned32 tcr;
- /*
- * initialize the interval here
- * First tick is set to right amount of time in the future
- * Future ticks will be incremented over last value set
- * in order to provide consistent clicks in the face of
- * interrupt overhead
- */
-
- rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
-
- asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
+ /*
+ * initialize the interval here
+ * First tick is set to right amount of time in the future
+ * Future ticks will be incremented over last value set
+ * in order to provide consistent clicks in the face of
+ * interrupt overhead
+ */
+
+ rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
+
+ asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
- asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+ asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
- tcr &= ~ 0x04400000;
+ tcr &= ~ 0x04400000;
- tcr |= (auto_restart ? 0x04400000 : 0x04000000);
+ tcr |= (auto_restart ? 0x04400000 : 0x04000000);
- tick_time = get_itimer() + pit_value;
+ tick_time = get_itimer() + pit_value;
- asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
- }
+ asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+
atexit(Clock_exit);
}
@@ -214,18 +213,15 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
void
Clock_exit(void)
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- register rtems_unsigned32 tcr;
+ register rtems_unsigned32 tcr;
- asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+ asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
- tcr &= ~ 0x04400000;
+ tcr &= ~ 0x04400000;
- asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+ asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
- (void) set_vector(0, PPC_IRQ_PIT, 1);
- }
-
+ (void) set_vector(0, PPC_IRQ_PIT, 1);
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
index a8acc1ca20..f8d604c6e5 100644
--- a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
+++ b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
@@ -223,58 +223,50 @@ void Install_clock(
Clock_limit = cclicks_per_tick / Clock_isrs_const ;
Clock_isrs = Clock_isrs_const;
+ rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
/*
- * If ticks_per_timeslice is configured as non-zero, then the user
- * wants a clock tick.
+ * Hardware specific initialize goes here
*/
+
+ /* stop Timer 0 */
+ temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
+ write8( temp8, ITU_TSTR);
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
- /*
- * Hardware specific initialize goes here
- */
-
- /* stop Timer 0 */
- temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
- write8( temp8, ITU_TSTR);
-
- /* set initial counter value to 0 */
- write16( 0, ITU_TCNT0);
+ /* set initial counter value to 0 */
+ write16( 0, ITU_TCNT0);
- /* Timer 0 runs independent */
- temp8 = read8( ITU_TSNC) & ITU0_SYNCMASK;
- write8( temp8, ITU_TSNC);
+ /* Timer 0 runs independent */
+ temp8 = read8( ITU_TSNC) & ITU0_SYNCMASK;
+ write8( temp8, ITU_TSNC);
- /* Timer 0 normal mode */
- temp8 = read8( ITU_TMDR) & ITU0_MODEMASK;
- write8( temp8, ITU_TMDR);
+ /* Timer 0 normal mode */
+ temp8 = read8( ITU_TMDR) & ITU0_MODEMASK;
+ write8( temp8, ITU_TMDR);
- /* TCNT is cleared by GRA ; internal clock /4 */
- write8( ITU0_TCRMASK , ITU_TCR0);
+ /* TCNT is cleared by GRA ; internal clock /4 */
+ write8( ITU0_TCRMASK , ITU_TCR0);
- /* use GRA without I/O - pins */
- write8( ITU0_TIORVAL, ITU_TIOR0);
+ /* use GRA without I/O - pins */
+ write8( ITU0_TIORVAL, ITU_TIOR0);
- /* reset flags of the status register */
- temp8 = read8( ITU_TSR0) & ITU_STAT_MASK;
- write8( temp8, ITU_TSR0);
+ /* reset flags of the status register */
+ temp8 = read8( ITU_TSR0) & ITU_STAT_MASK;
+ write8( temp8, ITU_TSR0);
- /* Irq if is equal GRA */
- temp8 = read8( ITU_TIER0) | ITU0_TIERMASK;
- write8( temp8, ITU_TIER0);
+ /* Irq if is equal GRA */
+ temp8 = read8( ITU_TIER0) | ITU0_TIERMASK;
+ write8( temp8, ITU_TIER0);
- /* set interrupt priority */
- if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
- rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
+ /* set interrupt priority */
+ if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
+ rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
- /* set counter limits */
- write16( Clock_limit, ITU_GRA0);
+ /* set counter limits */
+ write16( Clock_limit, ITU_GRA0);
- /* start counter */
- temp8 = read8( ITU_TSTR) |~ITU0_STARTMASK;
- write8( temp8, ITU_TSTR);
-
- }
+ /* start counter */
+ temp8 = read8( ITU_TSTR) |~ITU0_STARTMASK;
+ write8( temp8, ITU_TSTR);
/*
* Schedule the clock cleanup routine to execute if the application exits.
@@ -290,24 +282,22 @@ void Install_clock(
void Clock_exit( void )
{
unsigned8 temp8 = 0;
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* turn off the timer interrupts */
- /* set interrupt priority to 0 */
- if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
- rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
+ /* turn off the timer interrupts */
+ /* set interrupt priority to 0 */
+ if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
+ rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
/*
* temp16 = read16( ITU_TIER0) & IPRC_ITU0_IRQMASK;
* write16( temp16, ITU_TIER0);
*/
- /* stop counter */
- temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
- write8( temp8, ITU_TSTR);
+ /* stop counter */
+ temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
+ write8( temp8, ITU_TSTR);
- /* old vector shall not be installed */
- }
+ /* old vector shall not be installed */
}
/*
diff --git a/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c
index 031ae3225e..9e9278c24c 100644
--- a/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c
+++ b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c
@@ -161,61 +161,52 @@ void Install_clock(
Clock_MHZ = rtems_cpu_configuration_get_clicks_per_second() / 1000000 ;
+ rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
+
/*
- * If ticks_per_timeslice is configured as non-zero, then the user
- * wants a clock tick.
+ * Hardware specific initialize goes here
*/
-
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
- /*
- * Hardware specific initialize goes here
- */
- /* stop Timer 0 */
- temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
- write8( temp8, MTU_TSTR);
+ /* stop Timer 0 */
+ temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
+ write8( temp8, MTU_TSTR);
- /* set initial counter value to 0 */
- write16( 0, MTU_TCNT0);
+ /* set initial counter value to 0 */
+ write16( 0, MTU_TCNT0);
- /* Timer 0 runs independent */
- temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK;
- write8( temp8, MTU_TSYR);
+ /* Timer 0 runs independent */
+ temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK;
+ write8( temp8, MTU_TSYR);
- /* Timer 0 normal mode */
- temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK;
- write8( temp8, MTU_TMDR0);
+ /* Timer 0 normal mode */
+ temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK;
+ write8( temp8, MTU_TMDR0);
- /* TCNT is cleared by GRA ; internal clock /4 */
- write8( MTU0_TCRMASK , MTU_TCR0);
+ /* TCNT is cleared by GRA ; internal clock /4 */
+ write8( MTU0_TCRMASK , MTU_TCR0);
- /* use GRA without I/O - pins */
- write8( MTU0_TIORVAL, MTU_TIORL0);
+ /* use GRA without I/O - pins */
+ write8( MTU0_TIORVAL, MTU_TIORL0);
- /* reset flags of the status register */
- temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK;
- write8( temp8, MTU_TSR0);
+ /* reset flags of the status register */
+ temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK;
+ write8( temp8, MTU_TSR0);
- /* Irq if is equal GRA */
- temp8 = read8( MTU_TIER0) | MTU0_TIERMASK;
- write8( temp8, MTU_TIER0);
+ /* Irq if is equal GRA */
+ temp8 = read8( MTU_TIER0) | MTU0_TIERMASK;
+ write8( temp8, MTU_TIER0);
- /* set interrupt priority */
- if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
- rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
+ /* set interrupt priority */
+ if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
+ rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
- /* set counter limits */
- write16( _MTU_COUNTER0_MICROSECOND *
- rtems_configuration_get_microseconds_per_tick(),
-
- MTU_GR0A);
+ /* set counter limits */
+ write16( _MTU_COUNTER0_MICROSECOND *
+ rtems_configuration_get_microseconds_per_tick(), MTU_GR0A);
- /* start counter */
- temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK;
- write8( temp8, MTU_TSTR);
-
- }
+ /* start counter */
+ temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK;
+ write8( temp8, MTU_TSTR);
/*
* Schedule the clock cleanup routine to execute if the application exits.
@@ -231,24 +222,22 @@ void Install_clock(
void Clock_exit( void )
{
unsigned8 temp8 = 0;
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* turn off the timer interrupts */
- /* set interrupt priority to 0 */
- if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
- rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
+ /* turn off the timer interrupts */
+ /* set interrupt priority to 0 */
+ if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
+ rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
/*
* temp16 = read16( MTU_TIER0) & IPRC_MTU0_IRQMASK;
* write16( temp16, MTU_TIER0);
*/
- /* stop counter */
- temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
- write8( temp8, MTU_TSTR);
+ /* stop counter */
+ temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
+ write8( temp8, MTU_TSTR);
- /* old vector shall not be installed */
- }
+ /* old vector shall not be installed */
}
/*