2004-09-29 Joel Sherrill <joel@OARcorp.com>

	* README: i960 obsoleted.
	* i960/.cvsignore, i960/ChangeLog, i960/Makefile.am, i960/configure.ac,
	i960/i960ca/.cvsignore, i960/i960ca/Makefile.am,
	i960/i960ca/cpu_install_intr_stack.c,
	i960/i960ca/cpu_install_raw_isr.c, i960/i960ka/.cvsignore,
	i960/i960ka/Makefile.am, i960/i960ka/cpu_install_intr_stack.c,
	i960/i960ka/cpu_install_raw_isr.c, i960/i960rp/.cvsignore,
	i960/i960rp/Makefile.am, i960/i960rp/cpu_install_intr_stack.c,
	i960/i960rp/cpu_install_raw_isr.c, i960/include/i960CA.h,
	i960/include/i960HA.h, i960/include/i960JX_RP_common.h,
	i960/include/i960KA.h, i960/include/i960RP.h: Removed.

23 files changed, 19 insertions, 1314 deletions

diff --git a/c/src/lib/libcpu/ChangeLog b/c/src/lib/libcpu/ChangeLog
index f15b7e5f72..570a3205c0 100644
--- a/c/src/lib/libcpu/ChangeLog
+++ b/c/src/lib/libcpu/ChangeLog
@@ -1,3 +1,17 @@
+2004-09-29	Joel Sherrill <joel@OARcorp.com>
+
+	* README: i960 obsoleted.
+	* i960/.cvsignore, i960/ChangeLog, i960/Makefile.am, i960/configure.ac,
+	i960/i960ca/.cvsignore, i960/i960ca/Makefile.am,
+	i960/i960ca/cpu_install_intr_stack.c,
+	i960/i960ca/cpu_install_raw_isr.c, i960/i960ka/.cvsignore,
+	i960/i960ka/Makefile.am, i960/i960ka/cpu_install_intr_stack.c,
+	i960/i960ka/cpu_install_raw_isr.c, i960/i960rp/.cvsignore,
+	i960/i960rp/Makefile.am, i960/i960rp/cpu_install_intr_stack.c,
+	i960/i960rp/cpu_install_raw_isr.c, i960/include/i960CA.h,
+	i960/include/i960HA.h, i960/include/i960JX_RP_common.h,
+	i960/include/i960KA.h, i960/include/i960RP.h: Removed.
+
 2004-01-07	Joel Sherrill <joel@OARcorp.com>
 
 	* mips64orion/.cvsignore, mips64orion/ChangeLog,
diff --git a/c/src/lib/libcpu/README b/c/src/lib/libcpu/README
index e7e293660c..21d0dee7cb 100644
--- a/c/src/lib/libcpu/README
+++ b/c/src/lib/libcpu/README
@@ -5,10 +5,11 @@
 This is the README file for libcpu.
 
 This directory contains reusable libraries which are CPU dependent but not
-target board dependent.  For example, the HPPA has an on chip interval timer
-which may be used by all HPPA bsp's.
+target board dependent.  For example, the PowerPC has an on CPU decrementer
+register which may be used by all PowerPC BSP's for the Clock and Timer
+Drivers.
 
-Another example might be the Intel i960CA has on-chip DMA which could be
-supported in a library and placed in lib/libcpu/i960.  This level of support
+Other examples include the caching support for the m68k CPU models and
+MIPS CPU model exception vectoring routines.  This level of support
 will make it easier for others developing embedded applications on a given
 CPU.
diff --git a/c/src/lib/libcpu/i960/.cvsignore b/c/src/lib/libcpu/i960/.cvsignore
deleted file mode 100644
index bfdfd995be..0000000000
--- a/c/src/lib/libcpu/i960/.cvsignore
+++ /dev/null
@@ -1,14 +0,0 @@
-aclocal.m4
-autom4te*.cache
-config.cache
-config.guess
-config.log
-config.status
-config.sub
-configure
-depcomp
-install-sh
-Makefile
-Makefile.in
-missing
-mkinstalldirs
diff --git a/c/src/lib/libcpu/i960/ChangeLog b/c/src/lib/libcpu/i960/ChangeLog
deleted file mode 100644
index f5fe39c0ed..0000000000
--- a/c/src/lib/libcpu/i960/ChangeLog
+++ /dev/null
@@ -1,186 +0,0 @@
-2004-09-24	Ralf Corsepius <ralf_corsepius@rtems.org>
-
-	* configure.ac: Require automake > 1.9.
-
-2004-03-31	Ralf Corsepius <ralf_corsepius@rtems.org>
-
-	* i960rp/cpu_install_intr_stack.c: Cosmetics.
-
-2004-03-30	Ralf Corsepius <ralf_corsepius@rtems.org>
-
-	* i960ca/cpu_install_intr_stack.c, i960ca/cpu_install_raw_isr.c,
-	i960ka/cpu_install_intr_stack.c, i960ka/cpu_install_raw_isr.c,
-	i960rp/cpu_install_intr_stack.c, i960rp/cpu_install_raw_isr.c:
-	Convert to using c99 fixed size types.
-
-2004-03-26	Ralf Corsepius <ralf_corsepius@rtems.org>
-
-	* configure.ac: Add 2nd argument (rtems_updir) to RTEMS_TOP.
-
-2004-02-06	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* i960ca/Makefile.am, i960ka/Makefile.am, i960rp/Makefile.am: Don't 
-	include .../lib.am.
-
-2004-01-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* i960ca/Makefile.am, i960ka/Makefile.am, i960rp/Makefile.am:
-	Use automake compilation rules.
-	* Makefile.am: Add PREINSTALL_DIRS.
-	* configure.ac: Add subdir-objects to AUTOMAKE_OPTIONS.
-	Require automake >= 1.8.2.
-
-2004-01-14	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Re-add dirstamps to PRE/TMPINSTALL_FILES.
-	Add PRE/TMPINSTALL_FILES to CLEANFILES.
-
-2003-12-12	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Use mkdir_p. Remove dirs from PRE/TMPINSTALL_FILES.
-
-2003-12-12	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Require automake >= 1.8, autoconf >= 2.59.
-
-2003-12-02	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* i960ca/Makefile.am: Remove all-local: $(ARCH).
-	* i960ka/Makefile.am: Remove all-local: $(ARCH).
-	* i960rp/Makefile.am: Remove all-local: $(ARCH).
-
-2003-12-01	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Reformat. Use dirstamps for preinstallation.
-	* i960ca/Makefile.am: Reformat.
-	* i960ka/Makefile.am: Reformat.
-	* i960rp/Makefile.am: Reformat.
-
-2003-10-22	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Remove RTEMS_CANONICAL_HOST.
-
-2003-10-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Remove RTEMS_CHECK_CPU.
-
-2003-08-18	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Reflect having moved aclocal/.
-
-2003-08-16	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Reflect having moved automake/.
-	* i960ca/Makefile.am: Reflect having moved automake/.
-	* i960ka/Makefile.am: Reflect having moved automake/.
-	* i960rp/Makefile.am: Reflect having moved automake/.
-
-2003-08-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Use rtems-bugs@rtems.com as bug report email address.
-
-2003-03-06	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Remove AC_CONFIG_AUX_DIR.
-
-2003-02-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: AM_INIT_AUTOMAKE([1.7.2]).
-
-2003-02-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: AC_PREREQ(2.57).
-
-2003-01-20	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Merge-in include/Makefile.am.
-	* include/Makefile.am: Removed.
-	* configure.ac: Reflect changes above.
-
-2002-12-16	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Remove CPU_MODEL_SUBDIR.
-	* configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
-	* i960ca/Makefile.am: Eliminate *_O_FILES.
-	Don't include @RTEMS_BSP@.cfg.
-	* i960ka/Makefile.am: Ditto.
-	* i960rp/Makefile.am: Ditto.
-
-2002-12-06	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Remove RTEMS_CHECK_BSP_CACHE.
-
-2002-12-02	Joel Sherrill <joel@OARcorp.com>
-
-	* shared/soft_reset_asm.S: Removed.
-
-2002-10-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* .cvsignore: Reformat.
-	Add autom4te*cache.
-	Remove autom4te.cache.
-
-2002-08-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* i960ca/Makefile.am: Use .$(OBJEXT) instead of .o.
- 	* i960ka/Makefile.am: Use .$(OBJEXT) instead of .o.
- 	* i960rp/Makefile.am: Use .$(OBJEXT) instead of .o.
-
-2001-05-09	Joel Sherrill <joel@OARcorp.com>
-
-	* include/i960CA.h, include/i960RP.h: Correct inline assembly
-	forward reference labels.
- 
-2002-03-27	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac:
-	AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
-	AM_INIT_AUTOMAKE([no-define foreign 1.6]).
-	* i960ca/Makefile.am: Remove AUTOMAKE_OPTIONS.
-	* Makefile.am: Remove AUTOMAKE_OPTIONS.
-	* i960ka/Makefile.am: Remove AUTOMAKE_OPTIONS.
-	* i960rp/Makefile.am: Remove AUTOMAKE_OPTIONS.
-	* include/Makefile.am: Remove AUTOMAKE_OPTIONS.
-
-2001-10-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* .cvsignore: Add autom4te.cache for autoconf > 2.52.
-	* configure.in: Remove.
-	* configure.ac: New file, generated from configure.in by autoupdate.
-
-2001-09-27	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* include/Makefile.am: Use 'TMPINSTALL_FILES ='.
-
-2001-02-27	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* i960ca/Makefile.am, i960ka/Makefile.am, i960rp/Makefile.am:
-	Remove H_FILES.
-	* include/Makefile.am:  Apply include_*HEADERS instead of H_FILES.
-
-2000-11-09	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
-
-2000-11-02	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
-
-2000-10-26	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
-        Switch to GNU canonicalization.
-
-2000-10-18	Joel Sherrill <joel@OARcorp.com>
-
-	* Makefile.am: Corrected condition CPU model selection so
-	multilib'ing and bare BSP works.
-
-2000-09-04	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* i960ca/Makefile.am, i960ka/Makefile.am, i960rp/Makefile.am:
-	Include compile.am
-
-2000-08-10	Joel Sherrill <joel@OARcorp.com>
-
-	* ChangeLog: New file.
diff --git a/c/src/lib/libcpu/i960/Makefile.am b/c/src/lib/libcpu/i960/Makefile.am
deleted file mode 100644
index 3c629fd2ea..0000000000
--- a/c/src/lib/libcpu/i960/Makefile.am
+++ /dev/null
@@ -1,48 +0,0 @@
-##
-## $Id$
-##
-
-ACLOCAL_AMFLAGS = -I ../../../aclocal
-
-SUBDIRS = . i960ca i960ka i960rp
-
-include_libcpudir = $(includedir)/libcpu
-
-include_libcpu_HEADERS = include/i960CA.h include/i960HA.h include/i960KA.h \
-    include/i960RP.h include/i960JX_RP_common.h
-
-all-local: $(PREINSTALL_FILES)
-
-PREINSTALL_DIRS =
-PREINSTALL_FILES =
-
-$(PROJECT_INCLUDE)/libcpu/$(dirstamp):
-	@$(mkdir_p) $(PROJECT_INCLUDE)/libcpu
-	@: > $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-
-$(PROJECT_INCLUDE)/libcpu/i960CA.h: include/i960CA.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/i960CA.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/i960CA.h
-
-$(PROJECT_INCLUDE)/libcpu/i960HA.h: include/i960HA.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/i960HA.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/i960HA.h
-
-$(PROJECT_INCLUDE)/libcpu/i960KA.h: include/i960KA.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/i960KA.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/i960KA.h
-
-$(PROJECT_INCLUDE)/libcpu/i960RP.h: include/i960RP.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/i960RP.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/i960RP.h
-
-$(PROJECT_INCLUDE)/libcpu/i960JX_RP_common.h: include/i960JX_RP_common.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/i960JX_RP_common.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/i960JX_RP_common.h
-
-CLEANFILES = $(PREINSTALL_FILES)
-DISTCLEANFILES = $(PREINSTALL_DIRS)
-
-include $(top_srcdir)/../../../automake/subdirs.am
-include $(top_srcdir)/../../../automake/local.am
diff --git a/c/src/lib/libcpu/i960/configure.ac b/c/src/lib/libcpu/i960/configure.ac
deleted file mode 100644
index fb88cf3aa0..0000000000
--- a/c/src/lib/libcpu/i960/configure.ac
+++ /dev/null
@@ -1,35 +0,0 @@
-## Process this file with autoconf to produce a configure script.
-## 
-## $Id$
-
-AC_PREREQ(2.59)
-AC_INIT([rtems-c-src-lib-libcpu-i960],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
-AC_CONFIG_SRCDIR([i960ca])
-RTEMS_TOP([../../../../..],[../../..])
-
-RTEMS_CANONICAL_TARGET_CPU
-
-AM_INIT_AUTOMAKE([no-define foreign subdir-objects 1.9])
-AM_MAINTAINER_MODE
-
-RTEMS_ENABLE_BARE
-RTEMS_ENV_RTEMSBSP
-
-RTEMS_PROJECT_ROOT
-
-RTEMS_PROG_CC_FOR_TARGET
-AM_PROG_CC_C_O
-RTEMS_CANONICALIZE_TOOLS
-
-AM_CONDITIONAL(i960ca, test "$RTEMS_CPU_MODEL" = "i960ca")
-AM_CONDITIONAL(i960ka, test "$RTEMS_CPU_MODEL" = "i960ka")
-AM_CONDITIONAL(i960rp, test "$RTEMS_CPU_MODEL" = "i960rp")
-
-# Explicitly list all Makefiles here
-AC_CONFIG_FILES([Makefile
-i960ca/Makefile
-i960ka/Makefile
-i960rp/Makefile
-])
-AC_OUTPUT
-
diff --git a/c/src/lib/libcpu/i960/i960ca/.cvsignore b/c/src/lib/libcpu/i960/i960ca/.cvsignore
deleted file mode 100644
index 282522db03..0000000000
--- a/c/src/lib/libcpu/i960/i960ca/.cvsignore
+++ /dev/null
@@ -1,2 +0,0 @@
-Makefile
-Makefile.in
diff --git a/c/src/lib/libcpu/i960/i960ca/Makefile.am b/c/src/lib/libcpu/i960/i960ca/Makefile.am
deleted file mode 100644
index 4837a057f1..0000000000
--- a/c/src/lib/libcpu/i960/i960ca/Makefile.am
+++ /dev/null
@@ -1,27 +0,0 @@
-##
-## $Id$
-##
-
-include $(top_srcdir)/../../../automake/compile.am
-
-EXTRA_PROGRAMS =
-CLEANFILES =
-noinst_DATA =
-
-if i960ca
-EXTRA_PROGRAMS += score.rel
-CLEANFILES += score.rel
-score_rel_SOURCES = cpu_install_intr_stack.c cpu_install_raw_isr.c
-score_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
-score_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
-EXTRA_PROGRAMS += score_g.rel
-CLEANFILES += score_g.rel
-score_g_rel_SOURCES = $(score_rel_SOURCES)
-score_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
-score_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
-noinst_DATA += score$(LIB_VARIANT).rel
-endif
-
-include $(top_srcdir)/../../../automake/local.am
diff --git a/c/src/lib/libcpu/i960/i960ca/cpu_install_intr_stack.c b/c/src/lib/libcpu/i960/i960ca/cpu_install_intr_stack.c
deleted file mode 100644
index 50aa3ab19d..0000000000
--- a/c/src/lib/libcpu/i960/i960ca/cpu_install_intr_stack.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- *  Install interrupt stack i960ca
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <libcpu/i960CA.h>
-
-extern i960_PRCB *Prcb;
-
-void _CPU_Install_interrupt_stack( void )
-{
-  i960_PRCB *prcb = Prcb;
-  uint32_t     level;
-  
-  /*  
-   *  Set the Interrupt Stack in the PRCB and force a reload of it.
-   *  Interrupts are disabled for safety.
-   */
-
-  _CPU_ISR_Disable( level );
-
-    prcb->intr_stack = _CPU_Interrupt_stack_low;
-
-    i960_soft_reset( prcb );
-
-  _CPU_ISR_Enable( level );
-}
diff --git a/c/src/lib/libcpu/i960/i960ca/cpu_install_raw_isr.c b/c/src/lib/libcpu/i960/i960ca/cpu_install_raw_isr.c
deleted file mode 100644
index 06b437f71a..0000000000
--- a/c/src/lib/libcpu/i960/i960ca/cpu_install_raw_isr.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- *  Install raw interrupt vector for i960ca
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <libcpu/i960CA.h>
-
-#define i960_vector_caching_enabled( _prcb ) \
-   ((_prcb)->control_tbl->icon & 0x2000)
-
-extern i960_PRCB *Prcb;
-
-void _CPU_ISR_install_raw_handler(
-  uint32_t    vector,
-  proc_ptr    new_handler,
-  proc_ptr   *old_handler
-)
-{
-  i960_PRCB   *prcb = Prcb;
-  proc_ptr    *cached_intr_tbl = NULL;
-
-  /*  The i80960CA does not support vectors 0-7.  The first 9 entries
-   *  in the Interrupt Table are used to manage pending interrupts.
-   *  Thus vector 8, the first valid vector number, is actually in
-   *  slot 9 in the table.
-   */
-
-  *old_handler = prcb->intr_tbl[ vector + 1 ];
-
-  prcb->intr_tbl[ vector + 1 ] = new_handler;
-
-  if ( i960_vector_caching_enabled( prcb ) )
-    if ( (vector & 0xf) == 0x2 )       /* cacheable? */
-      cached_intr_tbl[ vector >> 4 ] = new_handler;
-}
diff --git a/c/src/lib/libcpu/i960/i960ka/.cvsignore b/c/src/lib/libcpu/i960/i960ka/.cvsignore
deleted file mode 100644
index 282522db03..0000000000
--- a/c/src/lib/libcpu/i960/i960ka/.cvsignore
+++ /dev/null
@@ -1,2 +0,0 @@
-Makefile
-Makefile.in
diff --git a/c/src/lib/libcpu/i960/i960ka/Makefile.am b/c/src/lib/libcpu/i960/i960ka/Makefile.am
deleted file mode 100644
index 77a656de86..0000000000
--- a/c/src/lib/libcpu/i960/i960ka/Makefile.am
+++ /dev/null
@@ -1,27 +0,0 @@
-##
-## $Id$
-##
-
-include $(top_srcdir)/../../../automake/compile.am
-
-EXTRA_PROGRAMS =
-CLEANFILES =
-noinst_DATA =
-
-if i960ka
-EXTRA_PROGRAMS += score.rel
-CLEANFILES += score.rel
-score_rel_SOURCES = cpu_install_intr_stack.c cpu_install_raw_isr.c
-score_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
-score_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
-EXTRA_PROGRAMS += score_g.rel
-CLEANFILES += score_g.rel
-score_g_rel_SOURCES = $(score_rel_SOURCES)
-score_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
-score_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
-noinst_DATA += score$(LIB_VARIANT).rel
-endif
-
-include $(top_srcdir)/../../../automake/local.am
diff --git a/c/src/lib/libcpu/i960/i960ka/cpu_install_intr_stack.c b/c/src/lib/libcpu/i960/i960ka/cpu_install_intr_stack.c
deleted file mode 100644
index 11851bd43c..0000000000
--- a/c/src/lib/libcpu/i960/i960ka/cpu_install_intr_stack.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- *  Install interrupt stack i960ka
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <libcpu/i960KA.h>
-
-extern i960_PRCB *Prcb;
-
-void _CPU_Install_interrupt_stack( void )
-{
-  i960_PRCB *prcb = Prcb;
-  uint32_t     level;
-  
-  /*  
-   *  Set the Interrupt Stack in the PRCB and force a reload of it.
-   *  Interrupts are disabled for safety.
-   */
-
-  _CPU_ISR_Disable( level );
-
-    prcb->intr_stack = _CPU_Interrupt_stack_low;
-
-    /* soft_reset( prcb ); XXX is there an action like this on the KA? */
-
-  _CPU_ISR_Enable( level );
-}
diff --git a/c/src/lib/libcpu/i960/i960ka/cpu_install_raw_isr.c b/c/src/lib/libcpu/i960/i960ka/cpu_install_raw_isr.c
deleted file mode 100644
index 9e4f82693e..0000000000
--- a/c/src/lib/libcpu/i960/i960ka/cpu_install_raw_isr.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- *  Install raw interrupt vector for i960ka
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <libcpu/i960KA.h>
-
-/* this is from the CA and probably not right */
-#define i960_vector_caching_enabled( _prcb ) \
-   ((_prcb)->control_tbl->icon & 0x2000)
-
-extern i960_PRCB *Prcb;
-
-void _CPU_ISR_install_raw_handler(
-  uint32_t    vector,
-  proc_ptr    new_handler,
-  proc_ptr   *old_handler
-)
-{
-  i960_PRCB   *prcb = Prcb;
-  proc_ptr    *cached_intr_tbl = NULL;
-
-  /*  The i80960CA does not support vectors 0-7.  The first 9 entries
-   *  in the Interrupt Table are used to manage pending interrupts.
-   *  Thus vector 8, the first valid vector number, is actually in
-   *  slot 9 in the table.
-   */
-
-  *old_handler = prcb->intr_tbl[ vector + 1 ];
-
-  prcb->intr_tbl[ vector + 1 ] = new_handler;
-
-  if ( i960_vector_caching_enabled( prcb ) )
-    if ( (vector & 0xf) == 0x2 )       /* cacheable? */
-      cached_intr_tbl[ vector >> 4 ] = new_handler;
-}
diff --git a/c/src/lib/libcpu/i960/i960rp/.cvsignore b/c/src/lib/libcpu/i960/i960rp/.cvsignore
deleted file mode 100644
index 282522db03..0000000000
--- a/c/src/lib/libcpu/i960/i960rp/.cvsignore
+++ /dev/null
@@ -1,2 +0,0 @@
-Makefile
-Makefile.in
diff --git a/c/src/lib/libcpu/i960/i960rp/Makefile.am b/c/src/lib/libcpu/i960/i960rp/Makefile.am
deleted file mode 100644
index 9e2b02334d..0000000000
--- a/c/src/lib/libcpu/i960/i960rp/Makefile.am
+++ /dev/null
@@ -1,27 +0,0 @@
-##
-## $Id$
-##
-
-include $(top_srcdir)/../../../automake/compile.am
-
-EXTRA_PROGRAMS =
-CLEANFILES =
-noinst_DATA =
-
-if i960rp
-EXTRA_PROGRAMS += score.rel
-CLEANFILES += score.rel
-score_rel_SOURCES = cpu_install_intr_stack.c cpu_install_raw_isr.c
-score_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
-score_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
-EXTRA_PROGRAMS += score_g.rel
-CLEANFILES += score_g.rel
-score_g_rel_SOURCES = $(score_rel_SOURCES)
-score_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
-score_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
-noinst_DATA += score$(LIB_VARIANT).rel
-endif
-
-include $(top_srcdir)/../../../automake/local.am
diff --git a/c/src/lib/libcpu/i960/i960rp/cpu_install_intr_stack.c b/c/src/lib/libcpu/i960/i960rp/cpu_install_intr_stack.c
deleted file mode 100644
index 5b459f7e2d..0000000000
--- a/c/src/lib/libcpu/i960/i960rp/cpu_install_intr_stack.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- *  Install interrupt stack i960RP
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <libcpu/i960RP.h>
-
-extern i960_PRCB *Prcb;
-
-void _CPU_Install_interrupt_stack( void )
-{
-  i960_PRCB *prcb = Prcb;
-  uint32_t     level;
-  uint32_t   *isp = (int *) ISP_ADDR;
-  
-  /*  
-   *  Set the Interrupt Stack in the on-CPU memory.
-   *  Interrupts are disabled for safety.
-   */
-
-  _CPU_ISR_Disable( level );
-
-    prcb->intr_stack = _CPU_Interrupt_stack_low;
-
-    *isp = (uint32_t) prcb->intr_stack;
-
-  _CPU_ISR_Enable( level );
-}
diff --git a/c/src/lib/libcpu/i960/i960rp/cpu_install_raw_isr.c b/c/src/lib/libcpu/i960/i960rp/cpu_install_raw_isr.c
deleted file mode 100644
index 31e5205cc3..0000000000
--- a/c/src/lib/libcpu/i960/i960rp/cpu_install_raw_isr.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- *  Install raw interrupt vector for i960RP
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <libcpu/i960RP.h>
-
-#define i960_vector_caching_enabled( _prcb ) \
-   ((*((unsigned int *) ICON_ADDR)) & 0x2000)
-
-extern i960_PRCB *Prcb;
-
-void _CPU_ISR_install_raw_handler(
-  uint32_t    vector,
-  proc_ptr    new_handler,
-  proc_ptr   *old_handler
-)
-{
-  i960_PRCB   *prcb = &Prcb;
-  proc_ptr    *cached_intr_tbl = NULL;
-
-  /*  The i80960RP does not support vectors 0-7.  The first 9 entries
-   *  in the Interrupt Table are used to manage pending interrupts.
-   *  Thus vector 8, the first valid vector number, is actually in
-   *  slot 9 in the table.
-   */
-
-  *old_handler = prcb->intr_tbl[ vector + 1 ];
-
-  prcb->intr_tbl[ vector + 1 ] = new_handler;
-
-  if ( i960_vector_caching_enabled( prcb ) )
-    if ( (vector & 0xf) == 0x2 )       /* cacheable? */
-      cached_intr_tbl[ vector >> 4 ] = new_handler;
-}
diff --git a/c/src/lib/libcpu/i960/include/i960CA.h b/c/src/lib/libcpu/i960/include/i960CA.h
deleted file mode 100644
index 509a833937..0000000000
--- a/c/src/lib/libcpu/i960/include/i960CA.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- *  i960ca
- *
- *  $Id$
- */
-
-#ifndef __i960CA_h
-#define __i960CA_h
-
-
-/* i960CA control structures */
- 
-/* Intel i960CA Control Table */
- 
-typedef struct {
-                            /* Control Group 0 */
-  unsigned int ipb0;              /* IP breakpoint 0 */
-  unsigned int ipb1;              /* IP breakpoint 1 */
-  unsigned int dab0;              /* data address breakpoint 0 */
-  unsigned int dab1;              /* data address breakpoint 1 */
-                            /* Control Group 1 */
-  unsigned int imap0;             /* interrupt map 0 */
-  unsigned int imap1;             /* interrupt map 1 */
-  unsigned int imap2;             /* interrupt map 2 */
-  unsigned int icon;              /* interrupt control */
-                            /* Control Group 2 */
-  unsigned int mcon0;             /* memory region 0 configuration */
-  unsigned int mcon1;             /* memory region 1 configuration */
-  unsigned int mcon2;             /* memory region 2 configuration */
-  unsigned int mcon3;             /* memory region 3 configuration */
-                            /* Control Group 3 */
-  unsigned int mcon4;             /* memory region 4 configuration */
-  unsigned int mcon5;             /* memory region 5 configuration */
-  unsigned int mcon6;             /* memory region 6 configuration */
-  unsigned int mcon7;             /* memory region 7 configuration */
-                            /* Control Group 4 */
-  unsigned int mcon8;             /* memory region 8 configuration */
-  unsigned int mcon9;             /* memory region 9 configuration */
-  unsigned int mcon10;            /* memory region 10 configuration */
-  unsigned int mcon11;            /* memory region 11 configuration */
-                            /* Control Group 5 */
-  unsigned int mcon12;            /* memory region 12 configuration */
-  unsigned int mcon13;            /* memory region 13 configuration */
-  unsigned int mcon14;            /* memory region 14 configuration */
-  unsigned int mcon15;            /* memory region 15 configuration */
-                            /* Control Group 6 */
-  unsigned int reserved;          /* reserved */
-  unsigned int bpcon;             /* breakpoint control */
-  unsigned int tc;                /* trace control */
-  unsigned int bcon;              /* bus configuration control */
-}   i960ca_control_table;
- 
-/* Intel i960CA Processor Control Block */
- 
-typedef struct {
-  unsigned int    *fault_tbl;     /* fault table base address */
-  i960ca_control_table
-                  *control_tbl;   /* control table base address */
-  unsigned int     initial_ac;    /* AC register initial value */
-  unsigned int     fault_config;  /* fault configuration word */
-  void           **intr_tbl;      /* interrupt table base address */
-  void            *sys_proc_tbl;  /* system procedure table
-                                     base address */
-  unsigned int     reserved;      /* reserved */
-  unsigned int    *intr_stack;    /* interrupt stack pointer */
-  unsigned int     ins_cache_cfg; /* instruction cache
-                                     configuration word */
-  unsigned int     reg_cache_cfg; /* register cache configuration word */
-}   i960ca_PRCB;
-
-typedef i960ca_control_table i960_control_table;
-typedef i960ca_PRCB i960_PRCB;
-
-#define i960_unmask_intr( xint ) \
- { register unsigned int _mask= (1<<(xint)); \
-   asm volatile( "or sf1,%0,sf1" : "=d" (_mask) : "0" (_mask) ); \
- }
-
-#define i960_mask_intr( xint ) \
- { register unsigned int _mask= (1<<(xint)); \
-   asm volatile( "andnot %0,sf1,sf1" : "=d" (_mask) : "0" (_mask) ); \
- }
-
-#define i960_clear_intr( xint ) \
- { register unsigned int _xint=(xint); \
-asm volatile( "99: clrbit %0,sf0,sf0 ; \
-                  bbs    %0,sf0, 99b" \
-                  : "=d" (_xint) : "0" (_xint) ); \
- }
-
-static inline unsigned int i960_pend_intrs()
-{ register unsigned int _intr=0;
-  asm volatile( "mov sf0,%0" : "=d" (_intr) : "0" (_intr) );
-  return ( _intr );
-}
-
-static inline unsigned int i960_mask_intrs()
-{ register unsigned int _intr=0;
-  asm volatile( "mov sf1,%0" : "=d" (_intr) : "0" (_intr) );
-  return( _intr );
-}
-
-#define I960_SOFT_RESET_COMMAND 0x30000
-
-#define i960_soft_reset( prcb ) \
- { register i960_PRCB    *_prcb = (prcb); \
-   register unsigned int *_next=0; \
-   register unsigned int  _cmd  = I960_SOFT_RESET_COMMAND; \
-   asm volatile( "lda    next,%1; \
-                  sysctl %0,%1,%2; \
-            next: mov    g0,g0" \
-                  : "=d" (_cmd), "=d" (_next), "=d" (_prcb) \
-                  : "0"  (_cmd), "1"  (_next), "2"  (_prcb) ); \
- }
-
-
-
-#endif
-/* end of include file */
diff --git a/c/src/lib/libcpu/i960/include/i960HA.h b/c/src/lib/libcpu/i960/include/i960HA.h
deleted file mode 100644
index 0afd911e75..0000000000
--- a/c/src/lib/libcpu/i960/include/i960HA.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- *  i960ha
- *
- *  $Id$
- */
-
-#ifndef __i960HA_h
-#define __i960HA_h
-
-
-
-/* i960HA control structures */
-
-/* Intel i960HA Control Table */
-
-typedef struct {
-                            /* Control Group 0 */
-  unsigned int ipb0;              /* IP breakpoint 0 */
-  unsigned int ipb1;              /* IP breakpoint 1 */
-  unsigned int dab0;              /* data address breakpoint 0 */
-  unsigned int dab1;              /* data address breakpoint 1 */
-                            /* Control Group 1 */
-  unsigned int imap0;             /* interrupt map 0 */
-  unsigned int imap1;             /* interrupt map 1 */
-  unsigned int imap2;             /* interrupt map 2 */
-  unsigned int icon;              /* interrupt control */
-                            /* Control Group 2 */
-  unsigned int mcon0;             /* memory region 0 configuration */
-  unsigned int mcon1;             /* memory region 1 configuration */
-  unsigned int mcon2;             /* memory region 2 configuration */
-  unsigned int mcon3;             /* memory region 3 configuration */
-                            /* Control Group 3 */
-  unsigned int mcon4;             /* memory region 4 configuration */
-  unsigned int mcon5;             /* memory region 5 configuration */
-  unsigned int mcon6;             /* memory region 6 configuration */
-  unsigned int mcon7;             /* memory region 7 configuration */
-                            /* Control Group 4 */
-  unsigned int mcon8;             /* memory region 8 configuration */
-  unsigned int mcon9;             /* memory region 9 configuration */
-  unsigned int mcon10;            /* memory region 10 configuration */
-  unsigned int mcon11;            /* memory region 11 configuration */
-                            /* Control Group 5 */
-  unsigned int mcon12;            /* memory region 12 configuration */
-  unsigned int mcon13;            /* memory region 13 configuration */
-  unsigned int mcon14;            /* memory region 14 configuration */
-  unsigned int mcon15;            /* memory region 15 configuration */
-                            /* Control Group 6 */
-  unsigned int reserved;          /* reserved */
-  unsigned int bpcon;             /* breakpoint control */
-  unsigned int tc;                /* trace control */
-  unsigned int bcon;              /* bus configuration control */
-}   i960ha_control_table;
-
-/* Intel i960HA Processor Control Block */
-
-typedef struct {
-  unsigned int    *fault_tbl;     /* fault table base address */
-  i960ha_control_table
-                  *control_tbl;   /* control table base address */
-  unsigned int     initial_ac;    /* AC register initial value */
-  unsigned int     fault_config;  /* fault configuration word */
-  void           **intr_tbl;      /* interrupt table base address */
-  void            *sys_proc_tbl;  /* system procedure table
-                                     base address */
-  unsigned int     reserved;      /* reserved */
-  unsigned int    *intr_stack;    /* interrupt stack pointer */
-  unsigned int     ins_cache_cfg; /* instruction cache
-                                     configuration word */
-  unsigned int     reg_cache_cfg; /* register cache configuration word */
-}   i960ha_PRCB;
-
-typedef i960ha_control_table i960_control_table;
-typedef i960ha_PRCB i960_PRCB;
-
-#define I960_SOFT_RESET_COMMAND 0x30000
-
-#define i960_soft_reset( prcb ) \
- { register i960_PRCB    *_prcb = (prcb); \
-   register unsigned int *_next=0; \
-   register unsigned int  _cmd  = I960_SOFT_RESET_COMMAND; \
-   asm volatile( "lda    next,%1; \
-                  sysctl %0,%1,%2; \
-            next: mov    g0,g0" \
-                  : "=d" (_cmd), "=d" (_next), "=d" (_prcb) \
-                  : "0"  (_cmd), "1"  (_next), "2"  (_prcb) ); \
- }
-
-
-
-#endif
-/* end of include file */
diff --git a/c/src/lib/libcpu/i960/include/i960JX_RP_common.h b/c/src/lib/libcpu/i960/include/i960JX_RP_common.h
deleted file mode 100644
index a5d5e4d087..0000000000
--- a/c/src/lib/libcpu/i960/include/i960JX_RP_common.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- *  i960JX and RP Shared Definitions.
- *
- *  $Id$
- */
-
-#ifndef __I960JX_RP_COMMON_h
-#define __I960JX_RP_COMMON_h
-
-/* Define JX Core memory mapped register addresses */
-/* Common to Jx and RP: */
-#define    DLMCON_ADDR    0xff008100
-#define    LMAR0_ADDR     0xff008108
-#define    LMMR0_ADDR     0xff00810c
-#define    LMAR1_ADDR     0xff008110
-#define    LMMR1_ADDR     0xff008114
-#define    IPB0_ADDR      0xff008400
-#define    IPB1_ADDR      0xff008404
-#define    DAB0_ADDR      0xff008420
-#define    DAB1_ADDR      0xff008424
-#define    BPCON_ADDR     0xff008440
-#define    IPND_ADDR      0xff008500
-#define    IMSK_ADDR      0xff008504
-#define    ICON_ADDR      0xff008510
-#define    IMAP0_ADDR     0xff008520
-#define    IMAP1_ADDR     0xff008524
-#define    IMAP2_ADDR     0xff008528
-#define    PMCON0_ADDR    0xff008600
-#define    PMCON2_ADDR    0xff008608
-#define    PMCON4_ADDR    0xff008610
-#define    PMCON6_ADDR    0xff008618
-#define    PMCON8_ADDR    0xff008620
-#define    PMCON10_ADDR   0xff008628
-#define    PMCON12_ADDR   0xff008630
-#define    PMCON14_ADDR   0xff008638
-#define    BCON_ADDR      0xff0086fc
-#define    PRCB_ADDR      0xff008700
-#define    ISP_ADDR       0xff008704
-#define    SSP_ADDR       0xff008708
-#define    DEVID_ADDR     0xff008710
-#define    TRR0_ADDR      0xff000300
-#define    TCR0_ADDR      0xff000304
-#define    TMR0_ADDR      0xff000308
-#define    TRR1_ADDR      0xff000310
-#define    TCR1_ADDR      0xff000314
-#define    TMR1_ADDR      0xff000318
-
-#endif
-/* end of include file */
diff --git a/c/src/lib/libcpu/i960/include/i960KA.h b/c/src/lib/libcpu/i960/include/i960KA.h
deleted file mode 100644
index 1fc1db21bd..0000000000
--- a/c/src/lib/libcpu/i960/include/i960KA.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- *  i960ka.h -- hacked version of CA.  Not checked on real hardware.
- *
- *  $Id$
- */
-
-#ifndef __i960KA_h
-#define __i960KA_h
-
-
-/* i960KA control structures */
- 
-/* Intel i960KA Control Table */
- 
-typedef struct {
-                            /* Control Group 0 */
-  unsigned int ipb0;              /* IP breakpoint 0 */
-  unsigned int ipb1;              /* IP breakpoint 1 */
-  unsigned int dab0;              /* data address breakpoint 0 */
-  unsigned int dab1;              /* data address breakpoint 1 */
-                            /* Control Group 1 */
-  unsigned int imap0;             /* interrupt map 0 */
-  unsigned int imap1;             /* interrupt map 1 */
-  unsigned int imap2;             /* interrupt map 2 */
-  unsigned int icon;              /* interrupt control */
-                            /* Control Group 2 */
-  unsigned int mcon0;             /* memory region 0 configuration */
-  unsigned int mcon1;             /* memory region 1 configuration */
-  unsigned int mcon2;             /* memory region 2 configuration */
-  unsigned int mcon3;             /* memory region 3 configuration */
-                            /* Control Group 3 */
-  unsigned int mcon4;             /* memory region 4 configuration */
-  unsigned int mcon5;             /* memory region 5 configuration */
-  unsigned int mcon6;             /* memory region 6 configuration */
-  unsigned int mcon7;             /* memory region 7 configuration */
-                            /* Control Group 4 */
-  unsigned int mcon8;             /* memory region 8 configuration */
-  unsigned int mcon9;             /* memory region 9 configuration */
-  unsigned int mcon10;            /* memory region 10 configuration */
-  unsigned int mcon11;            /* memory region 11 configuration */
-                            /* Control Group 5 */
-  unsigned int mcon12;            /* memory region 12 configuration */
-  unsigned int mcon13;            /* memory region 13 configuration */
-  unsigned int mcon14;            /* memory region 14 configuration */
-  unsigned int mcon15;            /* memory region 15 configuration */
-                            /* Control Group 6 */
-  unsigned int reserved;          /* reserved */
-  unsigned int bpcon;             /* breakpoint control */
-  unsigned int tc;                /* trace control */
-  unsigned int bcon;              /* bus configuration control */
-}   i960ka_control_table;
- 
-/* Intel i960KA Processor Control Block */
- 
-typedef struct {
-  unsigned int    *fault_tbl;     /* fault table base address */
-  i960ka_control_table
-                  *control_tbl;   /* control table base address */
-  unsigned int     initial_ac;    /* AC register initial value */
-  unsigned int     fault_config;  /* fault configuration word */
-  void           **intr_tbl;      /* interrupt table base address */
-  void            *sys_proc_tbl;  /* system procedure table
-                                     base address */
-  unsigned int     reserved;      /* reserved */
-  unsigned int    *intr_stack;    /* interrupt stack pointer */
-  unsigned int     ins_cache_cfg; /* instruction cache
-                                     configuration word */
-  unsigned int     reg_cache_cfg; /* register cache configuration word */
-}   i960ka_PRCB;
-
-typedef i960ka_control_table i960_control_table;
-typedef i960ka_PRCB i960_PRCB;
-
-#endif
-/* end of include file */
diff --git a/c/src/lib/libcpu/i960/include/i960RP.h b/c/src/lib/libcpu/i960/include/i960RP.h
deleted file mode 100644
index 558e2b9556..0000000000
--- a/c/src/lib/libcpu/i960/include/i960RP.h
+++ /dev/null
@@ -1,406 +0,0 @@
-/*
- *  i960RP Related Definitions.
- *
- *  NOTE:  There is some commonality with the JX series which is
- *         not currently supported by RTEMS.
- *
- *  $Id$
- */
-
-#ifndef __I960RP_h
-#define __I960RP_h
-
-/* i960RP control structures */
-
-/* Intel i960RP Control Table */
-
-typedef struct {
-                            /* Control Group 0 */
-  unsigned int rsvd00;
-  unsigned int rsvd01;
-  unsigned int rsvd02;
-  unsigned int rsvd03;
-                            /* Control Group 1 */
-  unsigned int imap0;             /* interrupt map 0 */
-  unsigned int imap1;             /* interrupt map 1 */
-  unsigned int imap2;             /* interrupt map 2 */
-  unsigned int icon;              /* interrupt control */
-                            /* Control Group 2 */
-  unsigned int pmcon0;            /* memory region 0 configuration */
-  unsigned int rsvd1;
-  unsigned int pmcon2;            /* memory region 2 configuration */
-  unsigned int rsvd2;
-                            /* Control Group 3 */
-  unsigned int pmcon4;            /* memory region 4 configuration */
-  unsigned int rsvd3;
-  unsigned int pmcon6;            /* memory region 6 configuration */
-  unsigned int rsvd4;
-                            /* Control Group 4 */
-  unsigned int pmcon8;            /* memory region 8 configuration */
-  unsigned int rsvd5;
-  unsigned int pmcon10;           /* memory region 10 configuration */
-  unsigned int rsvd6;
-                            /* Control Group 5 */
-  unsigned int pmcon12;           /* memory region 12 configuration */
-  unsigned int rsvd7;
-  unsigned int pmcon14;           /* memory region 14 configuration */
-  unsigned int rsvd8;
-                            /* Control Group 6 */
-  unsigned int rsvd9;
-  unsigned int rsvd10;
-  unsigned int tc;                /* trace control */
-  unsigned int bcon;              /* bus configuration control */
-}   i960rp_control_table;
-
-/* Intel i960RP Processor Control Block */
-
-/* Intel i960RP Processor Control Block */
-
-typedef struct {  
-  unsigned int    *fault_tbl;     /* fault table base address */
-  i960rp_control_table
-                  *control_tbl;   /* control table base address */
-  unsigned int     initial_ac;    /* AC register initial value */
-  unsigned int     fault_config;  /* fault configuration word */
-  void           **intr_tbl;      /* interrupt table base address */
-  void            *sys_proc_tbl;  /* system procedure table
-                                     base address */
-  unsigned int     reserved;      /* reserved */
-  unsigned int    *intr_stack;    /* interrupt stack pointer */
-  unsigned int     ins_cache_cfg; /* instruction cache
-                                     configuration word */
-  unsigned int     reg_cache_cfg; /* register cache configuration word */
-}   i960rp_PRCB;
-
-typedef i960rp_control_table i960_control_table;
-typedef i960rp_PRCB i960_PRCB;
-
-/* Addresses shared with JX */
-
-#include <libcpu/i960JX_RP_common.h>
-
-/* RP-only addresses: */
-/* RP MMRs */
-
-/* PCI-to-PCI Bridge Unit 0000 1000H through 0000 10FFH */
-#define VIDR_ADDR 0x00001000
-#define DIDR_ADDR 0x00001002
-#define PCMDR_ADDR 0x00001004
-#define PSR_ADDR 0x00001006
-#define RIDR_ADDR 0x00001008
-#define CCR_ADDR 0x00001009
-#define CLSR_ADDR 0x0000100C
-#define PLTR_ADDR 0x0000100D
-#define HTR_ADDR 0x0000100E
-/* Reserved 0x0000100F through  0x00001017 */
-#define PBNR_ADDR 0x00001018
-#define SBNR_ADDR 0x00001019
-#define SUBBNR_ADDR 0x0000101A
-#define SLTR_ADDR 0x0000101B
-#define IOBR_ADDR 0x0000101C
-#define IOLR_ADDR 0x0000101D
-#define SSR_ADDR 0x0000101E
-#define MBR_ADDR 0x00001020
-#define MLR_ADDR 0x00001022
-#define PMBR_ADDR 0x00001024
-#define PMLR_ADDR 0x00001026
-/* Reserved 0x00001028 through 0x00001033 */
-#define BSVIR_ADDR 0x00001034
-#define BSIR_ADDR 0x00001036
-/* Reserved 0x00001038 through 0x0000103D */
-#define BCR_ADDR 0x0000103E
-#define EBCR_ADDR 0x00001040
-#define SISR_ADDR 0x00001042
-#define PBISR_ADDR 0x00001044
-#define SBISR_ADDR 0x00001048
-#define SACR_ADDR 0x0000104C
-#define PIRSR_ADDR 0x00001050
-#define SIOBR_ADDR 0x00001054
-#define SIOLR_ADDR 0x00001055
-#define SMBR_ADDR 0x00001058
-#define SMLR_ADDR 0x0000105A
-#define SDER_ADDR 0x0000105C
-/* Reserved 0x0000105E through 0x000011FFH */
-
-/* Address Translation Unit 0000 1200H through 0000 12FFH */
-#define ATUVID_ADDR 0x00001200
-#define ATUDID_ADDR 0x00001202
-#define PATUCMD_ADDR 0x00001204
-#define PATUSR_ADDR 0x00001206
-#define ATURID_ADDR 0x00001208
-#define ATUCCR_ADDR 0x00001209
-#define ATUCLSR_ADDR 0x0000120C
-#define ATULT_ADDR 0x0000120D
-#define ATUHTR_ADDR 0x0000120E
-#define ATUBISTR_ADDR 0x0000120F
-#define PIABAR_ADDR 0x00001210
-/* Reserved 0x00001214 */
-/* Reserved 0x00001218 */
-/* Reserved 0x0000121C */
-/* Reserved 0x00001220 */
-/* Reserved 0x00001224 */
-/* Reserved 0x00001228 */
-#define ASVIR_ADDR 0x0000122C
-#define ASIR_ADDR 0x0000122E
-#define ERBAR_ADDR 0x00001230
-/* Reserved 0x00001234 */
-/* Reserved 0x00001238 */
-#define ATUILR_ADDR 0x0000123C
-#define ATUIPR_ADDR 0x0000123D
-#define ATUMGNT_ADDR 0x0000123E
-#define ATUMLAT_ADDR 0x0000123F
-#define PIALR_ADDR 0x00001240
-#define PIATVR_ADDR 0x00001244
-#define SIABAR_ADDR 0x00001248
-#define SIALR_ADDR 0x0000124C
-#define SIATVR_ADDR 0x00001250
-#define POMWVR_ADDR 0x00001254
-/* Reserved 0x00001258 */
-#define POIOWVR_ADDR 0x0000125C
-#define PODWVR_ADDR 0x00001260
-#define POUDR_ADDR 0x00001264
-#define SOMWVR_ADDR 0x00001268
-#define SOIOWVR_ADDR 0x0000126C
-/* Reserved 0x00001270 */
-#define ERLR_ADDR 0x00001274
-#define ERTVR_ADDR 0x00001278
-/* Reserved 0x0000127C */
-/* Reserved 0x00001280 */
-/* Reserved 0x00001284 */
-#define ATUCR_ADDR 0x00001288
-/* Reserved 0x0000128C */
-#define PATUISR_ADDR 0x00001290
-#define SATUISR_ADDR 0x00001294
-#define SATUCMD_ADDR 0x00001298
-#define SATUSR_ADDR 0x0000129A
-#define SODWVR_ADDR 0x0000129C
-#define SOUDR_ADDR 0x000012A0
-#define POCCAR_ADDR 0x000012A4
-#define SOCCAR_ADDR 0x000012A8
-#define POCCDR_ADDR 0x000012AC
-#define SOCCDR_ADDR 0x000012B0
-/* Reserved 0x000012B4 through 0x000012FF */
-
-/* Messaging Unit 0000 1300H through 0000 13FFH */
-#define ARSR_ADDR 0x00001300
-/* Reserved 0x00001304 */
-#define AWR_ADDR 0x00001308
-/* Reserved 0x0000130C */
-#define IMR0_ADDR 0x00001310
-#define IMR1_ADDR 0x00001314
-#define OMR0_ADDR 0x00001318
-#define OMR1_ADDR 0x0000131C
-#define IDR_ADDR 0x00001320
-#define IISR_ADDR 0x00001324
-#define IIMR_ADDR 0x00001328
-#define ODR_ADDR 0x0000132C
-#define OISR_ADDR 0x00001330
-#define OIMR_ADDR 0x00001334
-/* Reserved 0x00001338 through 0x0000134F */
-#define MUCR_ADDR 0x00001350
-#define QBAR_ADDR 0x00001354
-/* Reserved 0x00001358 */
-/* Reserved 0x0000135C */
-#define IFHPR_ADDR 0x00001360
-#define IFTPR_ADDR 0x00001364
-#define IPHPR_ADDR 0x00001368
-#define IPTPR_ADDR 0x0000136C
-#define OFHPR_ADDR 0x00001370
-#define OFTPR_ADDR 0x00001374
-#define OPHPR_ADDR 0x00001378
-#define OPTPR_ADDR 0x0000137C
-#define IAR_ADDR 0x00001380
-/* Reserved 0x00001384 through 0x000013FF */
-
-/* DMA Controller 0000 1400H through 0000 14FFH */
-#define CCR0_ADDR 0x00001400
-#define CSR0_ADDR 0x00001404
-/* Reserved 0x00001408 */
-#define DAR0_ADDR 0x0000140C
-#define NDAR0_ADDR 0x00001410
-#define PADR0_ADDR 0x00001414
-#define PUADR0_ADDR 0x00001418
-#define LADR0_ADDR 0x0000141C
-#define BCR0_ADDR 0x00001420
-#define DCR0_ADDR 0x00001424
-/* Reserved 0x00001428 through 0x0000143F */
-#define CCR1_ADDR 0x00001440
-#define CSR1_ADDR 0x00001444
-/* Reserved 0x00001448 */
-#define DAR1_ADDR 0x0000144C
-#define NDAR1_ADDR 0x00001450
-#define PADR1_ADDR 0x00001454
-#define PUADR1_ADDR 0x00001458
-#define LADR1_ADDR 0x0000145C
-#define BCR1_ADDR 0x00001460
-#define DCR1_ADDR 0x00001464
-/* Reserved 0x00001468 through 0x0000147F */
-#define CCR2_ADDR 0x00001480
-#define CSR2_ADDR 0x00001484
-/* Reserved 0x00001488 */
-#define DAR2_ADDR 0x0000148C
-#define NDAR2_ADDR 0x00001490
-#define PADR2_ADDR 0x00001494
-#define PUADR2_ADDR 0x00001498
-#define LADR2_ADDR 0x0000149C
-#define BCR2_ADDR 0x000014A0
-#define DCR2_ADDR 0x000014A4
-/* Reserved 0x000014A8 through 0x000014FF */
-
-/* Memory Controller 0000 1500H through 0000 15FFH */
-#define MBCR_ADDR 0x00001500
-#define MBBAR0_ADDR 0x00001504
-#define MBRWS0_ADDR 0x00001508
-#define MBWWS0_ADDR 0x0000150C
-#define MBBAR1_ADDR 0x00001510
-#define MBRWS1_ADDR 0x00001514
-#define MBWWS1_ADDR 0x00001518
-#define DBCR_ADDR 0x0000151C
-#define DBAR_ADDR 0x00001520
-#define DRWS_ADDR 0x00001524
-#define DWWS_ADDR 0x00001528
-#define DRIR_ADDR 0x0000152C
-#define DPER_ADDR 0x00001530
-#define BMER_ADDR 0x00001534
-#define MEAR_ADDR 0x00001538
-#define LPISR_ADDR 0x0000153C
-/* Reserved 0x00001540 through 0x000015FF */
-
-/* Local Bus Arbitration Unit 0000 1600H through 0000 167FH 
-*/
-#define LBACR_ADDR 0x00001600
-#define LBALCR_ADDR 0x00001604
-/* Reserved 0x00001608 through 0x0000167F */
-
-/* I2C Bus Interface Unit 0000 1680H through 0000 16FFH */
-#define ICR_ADDR 0x00001680
-#define ISR_ADDR 0x00001684
-#define ISAR_ADDR 0x00001688
-#define IDBR_ADDR 0x0000168C
-#define ICCR_ADDR 0x00001690
-/* Reserved 0x00001694 through 0x000016FF */
-
-/* PCI And Peripheral Interrupt Controller 0000 1700H through 
-0000 177FH */
-#define NISR_ADDR 0x00001700
-#define X7ISR_ADDR 0x00001704
-#define X6ISR_ADDR 0x00001708
-#define PDDIR_ADDR 0x00001710
-/* Reserved 0x00001714 through 0x0000177F */
-
-/* APIC Bus Interface Unit 0000 1780H through 0000 17FFH */
-#define APICIDR_ADDR 0x00001780
-#define APICARBID_ADDR 0x00001784
-#define EVR_ADDR 0x00001788
-#define IMR_ADDR 0x0000178C
-#define APICCSR_ADDR 0x00001790
-/* Reserved 0x00001794 through 0x000017FF  */
-
-/* Byte order bit for region configuration */
-/* Set to Little Endian for the 80960RP*/
-#define I960RP_BYTE_ORDER I960RP_BIG_ENDIAN(0)
-#define I960RP_BUS_WIDTH(bw)  ((bw==16)?(1<<22):(0)) | ((bw==32)?(2<<22):(0))
-#define I960RP_BIG_ENDIAN(on) ((on)?(0x1<<31):0)
-#define I960RP_BYTE_N(n,data)  (((unsigned)(data) >> (n*8)) & 0xFF)
-#define I960RP_BUS_WIDTH_8 0
-#define I960RP_BUS_WIDTH_16 (1<<22)
-#define I960RP_BUS_WIDTH_32 (1<<23)
-
-
-/* ATU Register Definitions */
-
-#define ATUCR_SECOUTEN 0x4
-#define ATUCR_PRIOUTEN 0x2
-#define ATUCR_DADRSELEN  0x100
-#define ATUCR_SECDADREN  0x80
-#define AUTCR_SECERRINTEN 0x20 
-#define AUTCR_PRIERRINTEN 0x10 
-
-#define ATUSCMD_IOEN 0x1
-#define ATUSCMD_MEMEN 0x2
-#define ATUSCMD_BUSMSTEN 0x4
-
-#define ATUPCMD_IOEN 0x1
-#define ATUPCMD_MEMEN 0x2
-#define ATUPCMD_BUSMSTEN 0x4
-
-/* EBCR Register Definitions */
-#define EBCR_CCR_MASK	0x4
-
-#define rp_readreg32( x) ( *((unsigned int *) x))
-#define rp_writereg32( x, v) ( *((unsigned int *) x) = v)
-#define rp_readreg16( x) ( *((unsigned short *) x))
-#define rp_writereg16( x, v) ( *((unsigned short *) x) = v)
-#define rp_readreg8( x) ( *((unsigned char *) x))
-#define rp_writereg8( x, v) ( *((unsigned char *) x) = v)
-
-
-/* i960 Memory Map values */
-
-#define RP_PRI_IO_WIND_BASE     0x90000000
-#define RP_SEC_IO_WIND_BASE	0x90010000
-#define RP_SEC_MEM_WIND_BASE	0x88000000
-#define RP_PRI_MEM_WIND_BASE	0x80000000
-
-#define i960_unmask_intr( xint ) \
- { register unsigned int _mask= (1<<(xint)); \
-   register unsigned int *_imsk = (int * ) IMSK_ADDR; \
-   register unsigned int _val= *_imsk; \
-   asm volatile( "or %0,%2,%0; \
-                  st %0,(%1)" \
-                    : "=d" (_val), "=d" (_imsk), "=d" (_mask) \
-                    : "0" (_val), "1" (_imsk), "2" (_mask) ); \
- }
-
-#define i960_mask_intr( xint ) \
- { register unsigned int _mask= (1<<(xint)); \
-   register unsigned int *_imsk = (int * ) IMSK_ADDR; \
-   register unsigned int _val = *_imsk; \
-   asm volatile( "andnot %2,%0,%0; \
-                  st %0,(%1)" \
-                    : "=d" (_val), "=d" (_imsk), "=d" (_mask) \
-                    : "0" (_val), "1" (_imsk), "2" (_mask) ); \
- }
-#define i960_clear_intr( xint ) \
- { register unsigned int _xint=xint; \
-   register unsigned int _mask=(1<<(xint)); \
-   register unsigned int *_ipnd = (int * ) IPND_ADDR; \
-   register unsigned int          _rslt = 0; \
-asm volatile( "99: mov 0, %0; \
-                  atmod %1, %2, %0; \
-                  bbs    %3,%0, 99b" \
-                  : "=d" (_rslt), "=d" (_ipnd), "=d" (_mask), "=d" (_xint) \
-                  : "0"  (_rslt), "1"  (_ipnd), "2"  (_mask), "3"  (_xint) ); \
- }
-
-static inline unsigned int i960_pend_intrs()
-{ register unsigned int _intr= *(unsigned int *) IPND_ADDR;
-  /*register unsigned int *_ipnd = (int * ) IPND_ADDR; \
-   asm volatile( "mov (%0),%1" \
-                    : "=d" (_ipnd), "=d" (_mask) \
-                    : "0" (_ipnd), "1" (_mask) ); \ */
-  return ( _intr );
-}
-
-static inline unsigned int i960_mask_intrs()
-{ register unsigned int _intr= *(unsigned int *) IMSK_ADDR;
-  /*asm volatile( "mov sf1,%0" : "=d" (_intr) : "0" (_intr) );*/
-  return( _intr );
-}
-
-#define I960_SOFT_RESET_COMMAND 0x300
-
-#define i960_soft_reset( prcb ) \
- { register i960_PRCB    *_prcb = (prcb); \
-   register unsigned int *_next=0; \
-   register unsigned int  _cmd  = I960_SOFT_RESET_COMMAND; \
-   asm volatile( "lda    next,%1; \
-                  sysctl %0,%1,%2; \
-            next: mov    g0,g0" \
-                  : "=d" (_cmd), "=d" (_next), "=d" (_prcb) \
-                  : "0"  (_cmd), "1"  (_next), "2"  (_prcb) ); \
- }
-
-
-#endif
-/* end of include file */