Removed old hack of using Configuration Table entry ticks_per_timeslice

being set to 0 to indicate that there should be no Clock Tick.  This
was used by the Timing Tests to avoid clock tick overhead perturbing
execution times.  Now the Timing Tests simply leave the Clock Tick
Driver out of the Device Driver Table.

9 files changed, 178 insertions, 235 deletions

diff --git a/c/src/lib/libcpu/hppa1.1/clock/clock.c b/c/src/lib/libcpu/hppa1.1/clock/clock.c
index 256d5bc2ae..7bf177e3d6 100644
--- a/c/src/lib/libcpu/hppa1.1/clock/clock.c
+++ b/c/src/lib/libcpu/hppa1.1/clock/clock.c
@@ -101,20 +101,18 @@ void Install_clock(rtems_isr_entry clock_isr)
 
     Clock_isrs = rtems_configuration_get_milliseconds_per_tick();
 
-    if ( rtems_configuration_get_ticks_per_timeslice() ) {
-        /*
-         * initialize the interval here
-         * First tick is set to right amount of time in the future
-         * Future ticks will be incremented over last value set
-         * in order to provide consistent clicks in the face of
-         * interrupt overhead
-         */
-
-        Clock_clicks_interrupt = Clock_read_itimer() + CPU_HPPA_CLICKS_PER_TICK;
-        set_itimer((rtems_unsigned32) Clock_clicks_interrupt);
-
-        (void) set_vector(clock_isr, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
-    }
+    /*
+     * initialize the interval here
+     * First tick is set to right amount of time in the future
+     * Future ticks will be incremented over last value set
+     * in order to provide consistent clicks in the face of
+     * interrupt overhead
+     */
+
+    Clock_clicks_interrupt = Clock_read_itimer() + CPU_HPPA_CLICKS_PER_TICK;
+    set_itimer((rtems_unsigned32) Clock_clicks_interrupt);
+
+    (void) set_vector(clock_isr, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
     atexit(Clock_exit);
 }
 
@@ -186,9 +184,7 @@ Clock_isr(rtems_vector_number vector)
 void
 Clock_exit(void)
 {
-    if ( rtems_configuration_get_ticks_per_timeslice() ) {
-        (void) set_vector(0, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
-    }
+  (void) set_vector(0, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1);
 }
 
 /*
diff --git a/c/src/lib/libcpu/mips/clock/ckinit.c b/c/src/lib/libcpu/mips/clock/ckinit.c
index 4fda46ea0b..c6ae88f9e0 100644
--- a/c/src/lib/libcpu/mips/clock/ckinit.c
+++ b/c/src/lib/libcpu/mips/clock/ckinit.c
@@ -160,21 +160,15 @@ void Install_clock(
   Clock_driver_ticks = 0;
   Clock_isrs = rtems_configuration_get_milliseconds_per_tick();
 
+  Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
   /*
-   *  If ticks_per_timeslice is configured as non-zero, then the user
-   *  wants a clock tick.
+   *  Hardware specific initialize goes here
    */
 
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
-    /*
-     *  Hardware specific initialize goes here
-     */
-
-    mips_timer_rate = rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
-    mips_set_timer( mips_timer_rate );
-    enable_int(CLOCK_VECTOR_MASK);
-  }
+  mips_timer_rate =
+     rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
+  mips_set_timer( mips_timer_rate );
+  enable_int(CLOCK_VECTOR_MASK);
 
   /*
    *  Schedule the clock cleanup routine to execute if the application exits.
@@ -189,10 +183,8 @@ void Install_clock(
 
 void Clock_exit( void )
 {
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    /* mips: turn off the timer interrupts */
-    disable_int(~CLOCK_VECTOR_MASK);
-  }
+  /* mips: turn off the timer interrupts */
+  disable_int(~CLOCK_VECTOR_MASK);
 }
 
 /*
diff --git a/c/src/lib/libcpu/mips64orion/clock/ckinit.c b/c/src/lib/libcpu/mips64orion/clock/ckinit.c
index 4fda46ea0b..c6ae88f9e0 100644
--- a/c/src/lib/libcpu/mips64orion/clock/ckinit.c
+++ b/c/src/lib/libcpu/mips64orion/clock/ckinit.c
@@ -160,21 +160,15 @@ void Install_clock(
   Clock_driver_ticks = 0;
   Clock_isrs = rtems_configuration_get_milliseconds_per_tick();
 
+  Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
   /*
-   *  If ticks_per_timeslice is configured as non-zero, then the user
-   *  wants a clock tick.
+   *  Hardware specific initialize goes here
    */
 
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
-    /*
-     *  Hardware specific initialize goes here
-     */
-
-    mips_timer_rate = rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
-    mips_set_timer( mips_timer_rate );
-    enable_int(CLOCK_VECTOR_MASK);
-  }
+  mips_timer_rate =
+     rtems_configuration_get_microseconds_per_tick() * CLOCKS_PER_MICROSECOND;
+  mips_set_timer( mips_timer_rate );
+  enable_int(CLOCK_VECTOR_MASK);
 
   /*
    *  Schedule the clock cleanup routine to execute if the application exits.
@@ -189,10 +183,8 @@ void Install_clock(
 
 void Clock_exit( void )
 {
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    /* mips: turn off the timer interrupts */
-    disable_int(~CLOCK_VECTOR_MASK);
-  }
+  /* mips: turn off the timer interrupts */
+  disable_int(~CLOCK_VECTOR_MASK);
 }
 
 /*
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c b/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
index 035af4d61d..988215fa26 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
@@ -48,12 +48,10 @@ rtems_device_minor_number rtems_clock_minor;
 
 void clockOff(void* unused)
 {
-  if (BSP_Configuration.ticks_per_timeslice)    {
-    /*
-     * Nothing to do as we cannot disable all interrupts and
-     * the decrementer interrupt enable is MSR_EE
-     */
-  }
+  /*
+   * Nothing to do as we cannot disable all interrupts and
+   * the decrementer interrupt enable is MSR_EE
+   */
 }
 void clockOn(void* unused)
 {
@@ -116,9 +114,7 @@ int clockIsOn(void* unused)
 
 void Clock_exit( void )
 {
-  if ( BSP_Configuration.ticks_per_timeslice ) {
-   (void) BSP_disconnect_clock_handler ();
-  }
+  (void) BSP_disconnect_clock_handler ();
 }
  
 /*
diff --git a/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c b/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
index a0fe3a02d2..b380758970 100644
--- a/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
@@ -81,28 +81,26 @@ void Install_clock(rtems_isr_entry clock_isr)
   if (pit_value > 0xffff) {           /* pit is only 16 bits long */
     rtems_fatal_error_occurred(-1);
   }  
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    
-    /*
-     * initialize the interval here
-     * First tick is set to right amount of time in the future
-     * Future ticks will be incremented over last value set
-     * in order to provide consistent clicks in the face of
-     * interrupt overhead
-     */
-    
-    rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
+
+  /*
+   * initialize the interval here
+   * First tick is set to right amount of time in the future
+   * Future ticks will be incremented over last value set
+   * in order to provide consistent clicks in the face of
+   * interrupt overhead
+   */
+  
+  rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
     
-    m821.sccr &= ~(1<<24);
-    m821.pitc = pit_value;
+  m821.sccr &= ~(1<<24);
+  m821.pitc = pit_value;
     
-    /* set PIT irq level, enable PIT, PIT interrupts */
-    /*  and clear int. status */
-    m821.piscr = M821_PISCR_PIRQ(0) |
-      M821_PISCR_PTE | M821_PISCR_PS | M821_PISCR_PIE; 
+  /* set PIT irq level, enable PIT, PIT interrupts */
+  /*  and clear int. status */
+  m821.piscr = M821_PISCR_PIRQ(0) |
+    M821_PISCR_PTE | M821_PISCR_PS | M821_PISCR_PIE; 
     
-    m821.simask |= M821_SIMASK_LVM0;
-  }
+  m821.simask |= M821_SIMASK_LVM0;
   atexit(Clock_exit);
 }
 
@@ -127,12 +125,10 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
 void
 Clock_exit(void)
 {
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    /* disable PIT and PIT interrupts */
-    m821.piscr &= ~(M821_PISCR_PTE | M821_PISCR_PIE); 
-    
-    (void) set_vector(0, PPC_IRQ_LVL0, 1);
-  }
+  /* disable PIT and PIT interrupts */
+  m821.piscr &= ~(M821_PISCR_PTE | M821_PISCR_PIE); 
+  
+  (void) set_vector(0, PPC_IRQ_LVL0, 1);
 }
 
 rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c b/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
index 25af11ce9a..73a586aa6a 100644
--- a/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
@@ -82,28 +82,26 @@ void Install_clock(rtems_isr_entry clock_isr)
   if (pit_value > 0xffff) {           /* pit is only 16 bits long */
     rtems_fatal_error_occurred(-1);
   }  
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
     
-    /*
-     * initialize the interval here
-     * First tick is set to right amount of time in the future
-     * Future ticks will be incremented over last value set
-     * in order to provide consistent clicks in the face of
-     * interrupt overhead
-     */
-    
-    rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
+  /*
+   * initialize the interval here
+   * First tick is set to right amount of time in the future
+   * Future ticks will be incremented over last value set
+   * in order to provide consistent clicks in the face of
+   * interrupt overhead
+   */
+  
+  rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
     
-    m860.sccr &= ~(1<<24);
-    m860.pitc = pit_value;
+  m860.sccr &= ~(1<<24);
+  m860.pitc = pit_value;
     
-    /* set PIT irq level, enable PIT, PIT interrupts */
-    /*  and clear int. status */
-    m860.piscr = M860_PISCR_PIRQ(0) |
-      M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE; 
+  /* set PIT irq level, enable PIT, PIT interrupts */
+  /*  and clear int. status */
+  m860.piscr = M860_PISCR_PIRQ(0) |
+    M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE; 
     
-    m860.simask |= M860_SIMASK_LVM0;
-  }
+  m860.simask |= M860_SIMASK_LVM0;
   atexit(Clock_exit);
 }
 
@@ -128,12 +126,10 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
 void
 Clock_exit(void)
 {
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    /* disable PIT and PIT interrupts */
-    m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE); 
+  /* disable PIT and PIT interrupts */
+  m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE); 
     
-    (void) set_vector(0, PPC_IRQ_LVL0, 1);
-  }
+  (void) set_vector(0, PPC_IRQ_LVL0, 1);
 }
 
 rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
index 44f07eff1f..d7e9514b5f 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
@@ -132,6 +132,7 @@ void Install_clock(rtems_isr_entry clock_isr)
 {
     rtems_isr_entry previous_isr;
     rtems_unsigned32 pvr, iocr;
+    register rtems_unsigned32 tcr;
  
     Clock_driver_ticks = 0;
  
@@ -164,31 +165,29 @@ void Install_clock(rtems_isr_entry clock_isr)
     pit_value = rtems_configuration_get_microseconds_per_tick() *
       rtems_cpu_configuration_get_clicks_per_usec();
  
-    if ( rtems_configuration_get_ticks_per_timeslice() ) {
-      register rtems_unsigned32 tcr;
 
-        /*
-         * initialize the interval here
-         * First tick is set to right amount of time in the future
-         * Future ticks will be incremented over last value set
-         * in order to provide consistent clicks in the face of
-         * interrupt overhead
-         */
- 
-      rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
- 
-      asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
+    /*
+     * initialize the interval here
+     * First tick is set to right amount of time in the future
+     * Future ticks will be incremented over last value set
+     * in order to provide consistent clicks in the face of
+     * interrupt overhead
+     */
+
+    rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
+
+    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
  
-      asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
  
-      tcr &= ~ 0x04400000;
+    tcr &= ~ 0x04400000;
  
-      tcr |= (auto_restart ? 0x04400000 : 0x04000000);
+    tcr |= (auto_restart ? 0x04400000 : 0x04000000);
  
-      tick_time = get_itimer() + pit_value;
+    tick_time = get_itimer() + pit_value;
  
-      asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
-    }
+    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+
     atexit(Clock_exit);
 }
 
@@ -214,18 +213,15 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
 void
 Clock_exit(void)
 {
-    if ( rtems_configuration_get_ticks_per_timeslice() ) {
-      register rtems_unsigned32 tcr;
+    register rtems_unsigned32 tcr;
  
-      asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
  
-      tcr &= ~ 0x04400000;
+    tcr &= ~ 0x04400000;
  
-      asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
  
-      (void) set_vector(0, PPC_IRQ_PIT, 1);
-    }
-
+    (void) set_vector(0, PPC_IRQ_PIT, 1);
 }
 
 rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
index a8acc1ca20..f8d604c6e5 100644
--- a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
+++ b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
@@ -223,58 +223,50 @@ void Install_clock(
   Clock_limit = cclicks_per_tick / Clock_isrs_const ;
   Clock_isrs = Clock_isrs_const;
 
+  rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
   /*
-   *  If ticks_per_timeslice is configured as non-zero, then the user
-   *  wants a clock tick.
+   *  Hardware specific initialize goes here
    */
+  
+  /* stop Timer 0 */
+  temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
+  write8( temp8, ITU_TSTR);
 
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
-    /*
-     *  Hardware specific initialize goes here
-     */
-    
-    /* stop Timer 0 */
-    temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
-    write8( temp8, ITU_TSTR);
-
-    /* set initial counter value to 0 */
-    write16( 0, ITU_TCNT0);
+  /* set initial counter value to 0 */
+  write16( 0, ITU_TCNT0);
 
-    /* Timer 0 runs independent */
-    temp8 = read8( ITU_TSNC) & ITU0_SYNCMASK;
-    write8( temp8, ITU_TSNC);
+  /* Timer 0 runs independent */
+  temp8 = read8( ITU_TSNC) & ITU0_SYNCMASK;
+  write8( temp8, ITU_TSNC);
 
-    /* Timer 0 normal mode */
-    temp8 = read8( ITU_TMDR) & ITU0_MODEMASK;
-    write8( temp8, ITU_TMDR);
+  /* Timer 0 normal mode */
+  temp8 = read8( ITU_TMDR) & ITU0_MODEMASK;
+  write8( temp8, ITU_TMDR);
 
-    /* TCNT is cleared by GRA ; internal clock /4 */
-    write8( ITU0_TCRMASK , ITU_TCR0);
+  /* TCNT is cleared by GRA ; internal clock /4 */
+  write8( ITU0_TCRMASK , ITU_TCR0);
 
-    /* use GRA without I/O - pins  */
-    write8( ITU0_TIORVAL, ITU_TIOR0); 
+  /* use GRA without I/O - pins  */
+  write8( ITU0_TIORVAL, ITU_TIOR0); 
     
-    /* reset flags of the status register */
-    temp8 = read8( ITU_TSR0) & ITU_STAT_MASK;
-    write8( temp8, ITU_TSR0);
+  /* reset flags of the status register */
+  temp8 = read8( ITU_TSR0) & ITU_STAT_MASK;
+  write8( temp8, ITU_TSR0);
 
-    /* Irq if is equal GRA */
-    temp8 = read8( ITU_TIER0) | ITU0_TIERMASK;
-    write8( temp8, ITU_TIER0);
+  /* Irq if is equal GRA */
+  temp8 = read8( ITU_TIER0) | ITU0_TIERMASK;
+  write8( temp8, ITU_TIER0);
 
-    /* set interrupt priority */
-    if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
-      rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
+  /* set interrupt priority */
+  if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
 
-    /* set counter limits */
-    write16( Clock_limit, ITU_GRA0);
+  /* set counter limits */
+  write16( Clock_limit, ITU_GRA0);
    
-    /* start counter */
-    temp8 = read8( ITU_TSTR) |~ITU0_STARTMASK;
-    write8( temp8, ITU_TSTR);
-    
-  }
+  /* start counter */
+  temp8 = read8( ITU_TSTR) |~ITU0_STARTMASK;
+  write8( temp8, ITU_TSTR);
 
   /*
    *  Schedule the clock cleanup routine to execute if the application exits.
@@ -290,24 +282,22 @@ void Install_clock(
 void Clock_exit( void )
 {
   unsigned8 temp8 = 0;
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
 
-    /* turn off the timer interrupts */
-    /* set interrupt priority to 0 */
-    if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
-      rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
+  /* turn off the timer interrupts */
+  /* set interrupt priority to 0 */
+  if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
 
 /*
  *   temp16 = read16( ITU_TIER0) & IPRC_ITU0_IRQMASK;
  *   write16( temp16, ITU_TIER0);
  */
 
-    /* stop counter */
-    temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
-    write8( temp8, ITU_TSTR);
+  /* stop counter */
+  temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
+  write8( temp8, ITU_TSTR);
 
-    /* old vector shall not be installed */
-  }
+  /* old vector shall not be installed */
 }
 
 /*
diff --git a/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c
index 031ae3225e..9e9278c24c 100644
--- a/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c
+++ b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c
@@ -161,61 +161,52 @@ void Install_clock(
 
   Clock_MHZ = rtems_cpu_configuration_get_clicks_per_second() / 1000000 ;
 
+  rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
+
   /*
-   *  If ticks_per_timeslice is configured as non-zero, then the user
-   *  wants a clock tick.
+   *  Hardware specific initialize goes here
    */
-
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
-    rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
-    /*
-     *  Hardware specific initialize goes here
-     */
     
-    /* stop Timer 0 */
-    temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
-    write8( temp8, MTU_TSTR);
+  /* stop Timer 0 */
+  temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
+  write8( temp8, MTU_TSTR);
 
-    /* set initial counter value to 0 */
-    write16( 0, MTU_TCNT0);
+  /* set initial counter value to 0 */
+  write16( 0, MTU_TCNT0);
 
-    /* Timer 0 runs independent */
-    temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK;
-    write8( temp8, MTU_TSYR);
+  /* Timer 0 runs independent */
+  temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK;
+  write8( temp8, MTU_TSYR);
 
-    /* Timer 0 normal mode */
-    temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK;
-    write8( temp8, MTU_TMDR0);
+  /* Timer 0 normal mode */
+  temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK;
+  write8( temp8, MTU_TMDR0);
 
-    /* TCNT is cleared by GRA ; internal clock /4 */
-    write8( MTU0_TCRMASK , MTU_TCR0);
+  /* TCNT is cleared by GRA ; internal clock /4 */
+  write8( MTU0_TCRMASK , MTU_TCR0);
 
-    /* use GRA without I/O - pins  */
-    write8( MTU0_TIORVAL, MTU_TIORL0); 
+  /* use GRA without I/O - pins  */
+  write8( MTU0_TIORVAL, MTU_TIORL0); 
     
-    /* reset flags of the status register */
-    temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK;
-    write8( temp8, MTU_TSR0);
+  /* reset flags of the status register */
+  temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK;
+  write8( temp8, MTU_TSR0);
 
-    /* Irq if is equal GRA */
-    temp8 = read8( MTU_TIER0) | MTU0_TIERMASK;
-    write8( temp8, MTU_TIER0);
+  /* Irq if is equal GRA */
+  temp8 = read8( MTU_TIER0) | MTU0_TIERMASK;
+  write8( temp8, MTU_TIER0);
 
-    /* set interrupt priority */
-    if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
-      rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
+  /* set interrupt priority */
+  if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
 
-    /* set counter limits */
-    write16( _MTU_COUNTER0_MICROSECOND * 
-      rtems_configuration_get_microseconds_per_tick(),
-
-	     MTU_GR0A);
+  /* set counter limits */
+  write16( _MTU_COUNTER0_MICROSECOND * 
+    rtems_configuration_get_microseconds_per_tick(), MTU_GR0A);
    
-    /* start counter */
-    temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK;
-    write8( temp8, MTU_TSTR);
-    
-  }
+  /* start counter */
+  temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK;
+  write8( temp8, MTU_TSTR);
 
   /*
    *  Schedule the clock cleanup routine to execute if the application exits.
@@ -231,24 +222,22 @@ void Install_clock(
 void Clock_exit( void )
 {
   unsigned8 temp8 = 0;
-  if ( rtems_configuration_get_ticks_per_timeslice() ) {
 
-    /* turn off the timer interrupts */
-    /* set interrupt priority to 0 */
-    if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
-      rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
+  /* turn off the timer interrupts */
+  /* set interrupt priority to 0 */
+  if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
 
 /*
  *   temp16 = read16( MTU_TIER0) & IPRC_MTU0_IRQMASK;
  *   write16( temp16, MTU_TIER0);
  */
 
-    /* stop counter */
-    temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
-    write8( temp8, MTU_TSTR);
+  /* stop counter */
+  temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
+  write8( temp8, MTU_TSTR);
 
-    /* old vector shall not be installed */
-  }
+  /* old vector shall not be installed */
 }
 
 /*