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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-12-22 11:33:13 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-01-09 14:03:34 +0100 |
| commit | c32a128cb2753c5d22965ca0302a5c5c08704505 (patch) | |
| tree | 66e57d8e1181ecec49cdf5f1aed3c065924ecc02 /c/src/lib/libcpu | |
| parent | bsps/powerpc: Delete C pre-processor warning (diff) | |
| download | rtems-c32a128cb2753c5d22965ca0302a5c5c08704505.tar.bz2 | |
bsps/powerpc: Add cache size functions
Diffstat (limited to 'c/src/lib/libcpu')
| -rw-r--r-- | c/src/lib/libcpu/powerpc/shared/src/cache_.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache_.h b/c/src/lib/libcpu/powerpc/shared/src/cache_.h index 4d335b6128..17758947e0 100644 --- a/c/src/lib/libcpu/powerpc/shared/src/cache_.h +++ b/c/src/lib/libcpu/powerpc/shared/src/cache_.h @@ -25,6 +25,52 @@ #define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT #endif +#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS + +static inline size_t _CPU_cache_get_data_cache_size(uint32_t level) +{ + switch (level) { + case 0: + /* Fall through */ +#ifdef PPC_CACHE_DATA_L3_SIZE + case 3: + return PPC_CACHE_DATA_L3_SIZE; +#endif +#ifdef PPC_CACHE_DATA_L2_SIZE + case 2: + return PPC_CACHE_DATA_L2_SIZE; +#endif +#ifdef PPC_CACHE_DATA_L1_SIZE + case 1: + return PPC_CACHE_DATA_L1_SIZE; +#endif + default: + return 0; + } +} + +static inline size_t _CPU_cache_get_instruction_cache_size(uint32_t level) +{ + switch (level) { + case 0: + /* Fall through */ +#ifdef PPC_CACHE_INSTRUCTION_L3_SIZE + case 3: + return PPC_CACHE_INSTRUCTION_L3_SIZE; +#endif +#ifdef PPC_CACHE_INSTRUCTION_L2_SIZE + case 2: + return PPC_CACHE_INSTRUCTION_L2_SIZE; +#endif +#ifdef PPC_CACHE_INSTRUCTION_L1_SIZE + case 1: + return PPC_CACHE_INSTRUCTION_L1_SIZE; +#endif + default: + return 0; + } +} + /* * CACHE MANAGER: The following functions are CPU-specific. * They provide the basic implementation for the rtems_* cache |