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| author | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-13 19:07:53 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-16 08:58:47 -0500 |
| commit | 2f3f206a542dbf4b5205e6d4c1620101fc79774d (patch) | |
| tree | 82bb65a3f44ae7478769742a972f2159c5b60b4b /c/src/lib/libcpu | |
| parent | libcpu/m68k/mcf532x/cache/cachepd.c: Fix warnings (diff) | |
| download | rtems-2f3f206a542dbf4b5205e6d4c1620101fc79774d.tar.bz2 | |
libcpu/i388: Fix warning i displayCpu.c
Diffstat (limited to 'c/src/lib/libcpu')
| -rw-r--r-- | c/src/lib/libcpu/i386/cpuModel.h | 10 | ||||
| -rw-r--r-- | c/src/lib/libcpu/i386/displayCpu.c | 7 |
2 files changed, 10 insertions, 7 deletions
diff --git a/c/src/lib/libcpu/i386/cpuModel.h b/c/src/lib/libcpu/i386/cpuModel.h index 277edef0fa..d17839b7ea 100644 --- a/c/src/lib/libcpu/i386/cpuModel.h +++ b/c/src/lib/libcpu/i386/cpuModel.h @@ -1,9 +1,10 @@ -/* cpuModel.h - * +/* * This file contains declaration for variables and code * that may be used to get the Intel Cpu identification * that has been performed by checkCPUtypeSetCr0 function. - * + */ + +/* * COPYRIGHT (c) 1998 valette@crf.canon.fr * * The license and distribution terms for this file may be @@ -30,7 +31,8 @@ extern char x86_vendor_id[13]; extern int have_cpuid; extern unsigned char Cx86_step; /* cyrix processor identification */ -extern void printCpuInfo(); /* Display this information on console in ascii form */ +/* Display this information on console in ascii form */ +extern void printCpuInfo(void); /* determine if the CPU has a TSC */ #define x86_has_tsc() \ diff --git a/c/src/lib/libcpu/i386/displayCpu.c b/c/src/lib/libcpu/i386/displayCpu.c index d784ae2798..f8ab3b3f7a 100644 --- a/c/src/lib/libcpu/i386/displayCpu.c +++ b/c/src/lib/libcpu/i386/displayCpu.c @@ -1,8 +1,9 @@ -/* displayCpu.c - * +/* * This file contains code for displaying the Intel Cpu identification * that has been performed by checkCPUtypeSetCr0 function. - * + */ + +/* * This file was updated by Joel Sherrill <joel.sherrill@oarcorp.com> * to define more capability bits, pick up more CPU model information, * and add more model strings. --joel (April 2010) |