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| author | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-15 14:20:14 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-16 08:58:49 -0500 |
| commit | 0626dba48a5190abe2ec90db5febde46c951b3af (patch) | |
| tree | 7785bb6280bbbf77a183429a65a3d04149d1eb99 /c/src/lib/libcpu/sh/sh7750 | |
| parent | arm/rtl22xx/startup/bspstart.c: Ensure bsp_start_default() is static (diff) | |
| download | rtems-0626dba48a5190abe2ec90db5febde46c951b3af.tar.bz2 | |
SH libcpu and libbsp: Fix warnings
Diffstat (limited to 'c/src/lib/libcpu/sh/sh7750')
| -rw-r--r-- | c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c b/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c index a4fefaece2..c64dac5b73 100644 --- a/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c +++ b/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c @@ -77,7 +77,7 @@ sh4uart_init(sh4uart *uart, void *tty, int chn, int int_driven) * RETURNS: * peripheral module clock in Hz. */ -uint32_t +static uint32_t sh4uart_get_Pph(void) { uint16_t frqcr = *(volatile uint16_t*)SH7750_FRQCR; @@ -418,7 +418,7 @@ sh4uart_set_attributes(sh4uart *uart, const struct termios *t) * RETURNS: * nothing */ -void +static void sh4uart_handle_error(sh4uart *uart) { if (uart->chn == SH4_SCI) { @@ -451,7 +451,6 @@ int sh4uart_poll_read(sh4uart *uart) { int chn = uart->chn; - int error_occured = 0; int parity_error = 0; int break_occured = 0; int ch; @@ -464,7 +463,6 @@ sh4uart_poll_read(sh4uart *uart) if (chn == SH4_SCI) { if ((SCSSR1 & (SH7750_SCSSR1_PER | SH7750_SCSSR1_FER | SH7750_SCSSR1_ORER)) != 0) { - error_occured = 1; if (SCSSR1 & (SH7750_SCSSR1_PER | SH7750_SCSSR1_FER)) parity_error = 1; sh4uart_handle_error(uart); @@ -475,7 +473,6 @@ sh4uart_poll_read(sh4uart *uart) if ((SCSSR2 & (SH7750_SCSSR2_ER | SH7750_SCSSR2_DR | SH7750_SCSSR2_BRK)) != 0 || (SCLSR2 & SH7750_SCLSR2_ORER) != 0) { - error_occured = 1; if (SCSSR2 & (SH7750_SCSSR1_PER | SH7750_SCSSR1_FER)) parity_error = 1; if (SCSSR2 & SH7750_SCSSR2_BRK) |