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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-11-14 18:40:22 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-11-14 18:40:22 +0000 |
| commit | 92cf35dbd396902b289b6c51b3284bec43e4a164 (patch) | |
| tree | 4ce2bcaebab45d2306dd94c52ba4067cd95c3e06 /c/src/lib/libcpu/sh/sh7045/include/iosh7045.h | |
| parent | 2001-11-08 Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff) | |
| download | rtems-92cf35dbd396902b289b6c51b3284bec43e4a164.tar.bz2 | |
2001-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* include/iosh7045.h: Add SCI0_SMR, SCI1_SMR for sh7032
compatibility to make simsh happy.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libcpu/sh/sh7045/include/iosh7045.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h b/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h index c3f7f0b54f..9c7abf0dc7 100644 --- a/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h +++ b/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h @@ -66,6 +66,8 @@ #define SCI_SSR0 (REG_BASE + 0x01a4) /*char: Serial status ch 0 */ #define SCI_RDR0 (REG_BASE + 0x01a5) /*char: Receive data ch 0 */ +#define SCI0_SMR SCI_SMR0 + /* SCI1 Registers */ #define SCI_SMR1 (REG_BASE + 0x01b0) /* char: Serial mode ch 1 */ #define SCI_BRR1 (REG_BASE + 0x01b1) /* char: Bit rate ch 1 */ @@ -74,6 +76,8 @@ #define SCI_SSR1 (REG_BASE + 0x01b4) /* char: Serial status ch 1 */ #define SCI_RDR1 (REG_BASE + 0x01b5) /* char: Receive data ch 1 */ +#define SCI1_SMR SCI_SMR1 + /* ADI */ /* High Speed A/D (Excluding A-Mask Part)*/ #define ADDRA (REG_BASE + 0x03F0) /* short */ |